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Upgrade symbolic fork with merged upstream/master (12.17.2)#8

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nsavoire merged 16 commits intodd_masterfrom
nsavoire/update_12.17.2
Mar 3, 2026
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Upgrade symbolic fork with merged upstream/master (12.17.2)#8
nsavoire merged 16 commits intodd_masterfrom
nsavoire/update_12.17.2

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@nsavoire nsavoire commented Mar 3, 2026

What?

This PR updates the Datadog symbolic fork by merging the latest changes from getsentry/symbolic master into our dd_master branch.

frankh and others added 16 commits December 1, 2025 13:23
Breakpad CFI readers [require][4] a .ra rule at every unwindable
address, but DWARF INIT rows can omit the return-address
register rule. That leaves function entry CFI unusable even
though the return address lives in a fixed register by ABI.

Add PowerPC register naming so LR can be emitted and use the
CPU family to supply a default .ra on INIT rows for ARM, MIPS,
and PowerPC when no explicit rule is present.

Based on my research, this is required for [Arm32][2], [Arm64][3],
[PPC][1].

Closes getsentry#948

[1]: https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html
[2]: https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst
[3]: https://student.cs.uwaterloo.ca/~cs452/docs/rpi4b/aapcs64.pdf
[4]: https://github.com/rust-minidump/rust-minidump/blob/df483d5774cae0fa1bb847eaa3dd8f4a15c7e9d9/breakpad-symbols/src/sym_file/walker.rs#L514-L517

* Add changelog entry for minidump

* Add ARM64 integration test for default .ra rule on CFI INIT rows

Commit befa7de adds logic to emit a default `.ra` rule on INIT rows
for architectures where the return address is stored in a register by
ABI convention. The DWARF CFI for ARM64 binaries specifies which column
represents the return address (column 30 / x30) but does not emit an
explicit rule stating the RA is in that register at function entry.
The CIE only defines `DW_CFA_def_cfa` for the stack pointer, and leaf
functions have no CFI operations beyond `DW_CFA_nop`.

Without the default rule, unwinders lack the information needed to
retrieve the return address from x30 at the start of functions that
have not yet pushed LR to the stack.

This commit adds an ARM64 ELF fixture and snapshot test to verify the
fix works correctly. The fixture is compiled with -O2 to be
representative of real-world binaries. The snapshot confirms all INIT
rows include `.ra: x30` where DWARF omits an explicit rule.
This PR migrates from the deprecated action-prepare-release to the new
Craft GitHub Actions (reusable workflow or composite action).

Changes:
- Migrate .github/workflows/release.yml to Craft reusable workflow
We already broke MSRV with b75c1c9
(getsentry#945). Fortunately 1.83.0 is sufficient.
Current versions of `zip` depend on a version of `flate2` containing a
bug(?) related to short input streams, see
rust-lang/flate2-rs#499. As such, we have to
slightly tweak our Unreal crash parser to make sure very short streams
(<4B) are detected as malformed.
This bundles some dependency updates that don't require any further intervention.
* `cpp-demangle`: 0.4.1 -> 0.5.1
* `criterion`: 0.5.1 -> 0.8.1
* `itertools`: 0.13.0 -> 0.14.0
* `minidump`, `minidump-processor`, `minidump-unwind`: 0.22.0 -> 0.26.1
* `msvc-demangler`: 0.10.0 -> 0.11.0
* `proguard`: 5.4.0 -> 5.8.1
* `thiserror`: 1.0.39 -> 2.0.17
Arch is a type for which Pod is not sound to implement because not every pattern of 32 bits is valid for it.
@nsavoire nsavoire requested review from a team March 3, 2026 11:30
@nsavoire nsavoire merged commit 6d1d183 into dd_master Mar 3, 2026
10 of 11 checks passed
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9 participants