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Screen
The Screen is a component that allows graphics to be rendered by the processor. It operates in a simplified manner compared to real screens, where each pixel is mapped to an address in memory. This design allows you to change the color of any pixel using a single store instruction.
The screen has a square aspect ratio, with a resolution that can be configured to any power-of-two value below 256. For practical reasons, the default resolution is set to 64, using 14 bits to address every pixel (6-bit word addresses for each axis).
Since each pixel requires at least 24 bits to represent its color, each one is mapped to a full 32-bit word. Therefore, to move from one pixel to the next, you must increment or decrement the address by 4.
Although the screen is available in Logisim, due to the limited performance of the simulation, it is recommended to use the SystemVerilog simulation for more complex rendering tasks.
In the SystemVerilog interface, there are two important configuration options. The first is the resolution, which can be adjusted as needed. The second is the Screen Refresh Delay, which controls how frequently the program reads the file—lower values result in faster refresh rates.
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- 1.1 Introduction
- 1.2 RISC-V Implementation
- 1.2.1 Available Instruction Set
- 1.2.2 Available Non-ISA Features
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- 2.1 ALU
- 2.2 Register File
- 2.3 Program Counter
- 2.4 Input Buffer
- 2.5 RAM
- 2.6 Operation Controller
- 2.7 CSR Controller
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- 3.1 Input Devices
- 3.1.1 Keyboard
- 3.1.2 Switches and Joystick
- 3.1.3 Random Number Generator
- 3.1.4 Real-Time Device
- 3.2 Output Devices
- 3.2.1 Screen
- 3.2.2 Terminal
- 3.2.3 Software Interrupt Register
- 3.1 Input Devices