Blog post: correct RVV HPL on the RISC-V SpaceMiT X60, via EESSI

[hmeiland]

Blog post: correct RVV HPL on the RISC-V SpaceMiT X60, via EESSI

Companion to the SiFive U74 post (#818). This adds a walkthrough — reproduced entirely from the EESSI
CVMFS stack on an Orange Pi RV2 (SpaceMiT K1 / X60, RVV 1.0 VLEN=256):

• Stock EESSI OpenBLAS/0.3.30-GCC-14.3.0 is a DYNAMIC_ARCH build that dispatches the RVV
  RISCV64_ZVL256B kernels on the X60 — but 0.3.30's gemv_n kernel zeroes an uninitialized vector
  register, so stock EESSI HPL fails with residual = nan on this board (it even reports a
  healthy-looking ~8.5 GFLOP/s; only the residual check reveals the answer is garbage).
• The post reproduces the NaN from a clean CVMFS shell, builds the fix straight from easyconfigs PR
  OpenBLAS-0.3.30-GCC-14.3.0-x60.eb (SpaceMiT X60 / K1 RVV ZVL256B target) easybuilders/easybuild-easyconfigs#26444 via eb --from-pr, swaps it in with FlexiBLAS, and shows HPL
  PASS (residual ~4e-03) — peak ~10.5 GFLOP/s (N=20000, 2×4). It also notes the clean upgrade path
  (OpenBLAS ≥ 0.3.34) for when EESSI bumps past 0.3.30.

Files

• docs/blog/posts/2026/07/risc-v-x60-openblas-hpl.md — the post (authors: [hmeiland], date: 2026-07-12).
• docs/blog/.authors.yml — adds the hmeiland author entry.

Note: this adds the same hmeiland .authors.yml entry as #818. Whichever of the two merges
first, the other just needs a trivial rebase to drop the duplicate author block.

Produced with AI assistance (an OpenCode agent driving Claude Opus 4.8 via GitHub Copilot); a human
directed the work, operated the SpaceMiT X60 hardware, and validated every result — per the
EasyBuild AI policy. A disclosure note is included at the foot of
the post itself.