Demonstrator for sys_core emulation

[unbtorsten]

Scope

• Contributions toward emulator prototype #2 led to realization that sanimut_run establishes session based on interaction with sys_core, hence, emulation of application-core (trxpc1_core) is insufficient. This hack adapts the prototype for use with only the module sys_core.

Open Points

• (tentative): create fpga_core based emulator testmodule for target emulator, cf. https://github.com/ERAS-Research/sanimut_fpga/pull/101
• Refactor sys_core.v (completed in https://github.com/ERAS-Research/sanimut_fpga/pull/100)
  • iverilog requires different syntax in axis_fifo parametrization (e.g. commenting out)

    //.USER_ENABLE(0),
    //.USER_WIDTH (0),
    

  • Add missing line near top

    `include "def_trxpc1_static_configuration.vh"
    

• Refactor trxpc1_core.v (completed in https://github.com/ERAS-Research/sanimut_fpga/pull/100)
  • Add missing line near top

    `include "def_sys_static_configuration.vh"
    

Test

export SANIMUT_FPGA_SOURCEDIR=[PATH/TO/sanimut_fpga]/sanimut/rtl/hdl/
cd demo_hack
make
./run_direct.sh

In another terminal:

sanimut_run --use_device fpgamodel

Expected output

Communication and handshakes can be observed in both terminals:

Test (via UNB network)

On local computer:

• Modify demo_hack/demo_sanimut.py,

  if_socket = SocketInterface(20002, host_address=<USER_IP>)
  

• Run

  cd demo_hack
  make
  ./run_direct.sh
  

On remote machine:

• Modify/create devices.conf with section

  [virtual1]
  name=helium
  # Address of computer/host
  src_addr=<USER_IP>
  # Port on computer
  src_port=20000
  # Address of FPGA/Emulator
  dst_addr=<EMULATOR_IP>
  # Port on FPGA
  dst_port=20002
  

• Run

  sanimut_run --use_device helium
  

Enjoy the output

[mferris03]

Struggling with both the makefile and python test. for the makefile, should the SANIMUT_FPGA_SOURCEDIR variable point to the top level of the sanimut_fpga repo? For the python test I assume its for the future given the lack of the Static file
Edit: found the right variable name

[unbtorsten]

That piece of information was missing. You'll need to set

export SANIMUT_FPGA_SOURCEDIR=[PATH/TO/sanimut_fpga]/sanimut/rtl/hdl/