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fix: align DMA buffers to 32bytes on H7#6517

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fix: align DMA buffers to 32bytes on H7#6517
3djc wants to merge 1 commit intomainfrom
3djc/h7-dma-alignement

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@3djc
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@3djc 3djc commented Aug 14, 2025

Align DMA buffers to 32bytes on H7

Fixes #6509

Thanks Radiomaster for spotting that one.

@pfeerick pfeerick added the bug 🪲 Something isn't working label Aug 15, 2025
@richardclli
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@3djc Did you read my comment in #6509 ?

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3djc commented Aug 17, 2025

I did, but my goal here is not to optimize dma buffer by splitting read and write, but simply fixing a wrong alignment we are using today.

Your link actually highlight the need for this change: "Please note that in case of reception there can be problem if rx_buffer is not aligned to the size of cache-line (32-bytes), because during the invalidate operation another data sharing the same cache-line(s) with rx_buffer can be lost."

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This was also in #6484 so not merging.

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Cache alignement on H7

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