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2 changes: 1 addition & 1 deletion include/croutine.h
Original file line number Diff line number Diff line change
Expand Up @@ -65,7 +65,7 @@ typedef struct corCoRoutineControlBlock
* crCOROUTINE_CODE pxCoRoutineCode,
* UBaseType_t uxPriority,
* UBaseType_t uxIndex
* );
* );
* </pre>
*
* Create a new co-routine and add it to the list of co-routines that are
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6 changes: 3 additions & 3 deletions include/timers.h
Original file line number Diff line number Diff line change
Expand Up @@ -1329,10 +1329,10 @@ BaseType_t xTimerGenericCommand( TimerHandle_t xTimer,
/**
* task.h
* <pre>void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) </pre>
*
* This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB. This function is required when
*
* This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB. This function is required when
* configSUPPORT_STATIC_ALLOCATION is set. For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
*
*
* @param ppxTimerTaskTCBBuffer A handle to a statically allocated TCB buffer
* @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
* @param pulTimerTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
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586 changes: 293 additions & 293 deletions portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c

Large diffs are not rendered by default.

6 changes: 3 additions & 3 deletions portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h
Original file line number Diff line number Diff line change
Expand Up @@ -151,9 +151,9 @@
* 8-bit values encoded as follows:
* Bit[7:4] - 0000 - Device Memory
* Bit[3:2] - 00 --> Device-nGnRnE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* Bit[1:0] - 00, Reserved.
*/
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
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454 changes: 227 additions & 227 deletions portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c

Large diffs are not rendered by default.

Original file line number Diff line number Diff line change
Expand Up @@ -151,9 +151,9 @@
* 8-bit values encoded as follows:
* Bit[7:4] - 0000 - Device Memory
* Bit[3:2] - 00 --> Device-nGnRnE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* Bit[1:0] - 00, Reserved.
*/
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
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506 changes: 253 additions & 253 deletions portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c

Large diffs are not rendered by default.

6 changes: 3 additions & 3 deletions portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h
Original file line number Diff line number Diff line change
Expand Up @@ -151,9 +151,9 @@
* 8-bit values encoded as follows:
* Bit[7:4] - 0000 - Device Memory
* Bit[3:2] - 00 --> Device-nGnRnE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* Bit[1:0] - 00, Reserved.
*/
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
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354 changes: 177 additions & 177 deletions portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c

Large diffs are not rendered by default.

Original file line number Diff line number Diff line change
Expand Up @@ -151,9 +151,9 @@
* 8-bit values encoded as follows:
* Bit[7:4] - 0000 - Device Memory
* Bit[3:2] - 00 --> Device-nGnRnE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* Bit[1:0] - 00, Reserved.
*/
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
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6 changes: 3 additions & 3 deletions portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h
Original file line number Diff line number Diff line change
Expand Up @@ -151,9 +151,9 @@
* 8-bit values encoded as follows:
* Bit[7:4] - 0000 - Device Memory
* Bit[3:2] - 00 --> Device-nGnRnE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* Bit[1:0] - 00, Reserved.
*/
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
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Original file line number Diff line number Diff line change
Expand Up @@ -151,9 +151,9 @@
* 8-bit values encoded as follows:
* Bit[7:4] - 0000 - Device Memory
* Bit[3:2] - 00 --> Device-nGnRnE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* Bit[1:0] - 00, Reserved.
*/
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
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6 changes: 3 additions & 3 deletions portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h
Original file line number Diff line number Diff line change
Expand Up @@ -151,9 +151,9 @@
* 8-bit values encoded as follows:
* Bit[7:4] - 0000 - Device Memory
* Bit[3:2] - 00 --> Device-nGnRnE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* Bit[1:0] - 00, Reserved.
*/
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -151,9 +151,9 @@
* 8-bit values encoded as follows:
* Bit[7:4] - 0000 - Device Memory
* Bit[3:2] - 00 --> Device-nGnRnE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* 01 --> Device-nGnRE
* 10 --> Device-nGRE
* 11 --> Device-GRE
* Bit[1:0] - 00, Reserved.
*/
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
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Original file line number Diff line number Diff line change
Expand Up @@ -40,21 +40,21 @@ secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandl
/* xSecureContextHandle value is in r0. */
__asm volatile
(
" .syntax unified \n"
" \n"
" mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
" .syntax unified \n"
" \n"
" mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
#if ( configENABLE_MPU == 1 )
" ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
" msr control, r3 \n"/* CONTROL = r3. */
" ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
" msr control, r3 \n"/* CONTROL = r3. */
#endif /* configENABLE_MPU */
" msr psplim, r2 \n"/* PSPLIM = r2. */
" msr psp, r1 \n"/* PSP = r1. */
" \n"
" load_ctx_therad_mode: \n"
" nop \n"
" \n"
" msr psplim, r2 \n"/* PSPLIM = r2. */
" msr psp, r1 \n"/* PSP = r1. */
" \n"
" load_ctx_therad_mode: \n"
" nop \n"
" \n"
::: "r0", "r1", "r2"
);
}
Expand All @@ -65,26 +65,26 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl
/* xSecureContextHandle value is in r0. */
__asm volatile
(
" .syntax unified \n"
" \n"
" mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" mrs r1, psp \n"/* r1 = PSP. */
" .syntax unified \n"
" \n"
" mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" mrs r1, psp \n"/* r1 = PSP. */
#if ( configENABLE_MPU == 1 )
" mrs r2, control \n"/* r2 = CONTROL. */
" subs r1, r1, #4 \n"/* Make space for the CONTROL value on the stack. */
" str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
" stmia r1!, {r2} \n"/* Store CONTROL value on the stack. */
" mrs r2, control \n"/* r2 = CONTROL. */
" subs r1, r1, #4 \n"/* Make space for the CONTROL value on the stack. */
" str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
" stmia r1!, {r2} \n"/* Store CONTROL value on the stack. */
#else /* configENABLE_MPU */
" str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
" str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
#endif /* configENABLE_MPU */
" movs r1, %0 \n"/* r1 = securecontextNO_STACK. */
" msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */
" msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
" \n"
" save_ctx_therad_mode: \n"
" nop \n"
" \n"
" movs r1, %0 \n"/* r1 = securecontextNO_STACK. */
" msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */
" msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
" \n"
" save_ctx_therad_mode: \n"
" nop \n"
" \n"
::"i" ( securecontextNO_STACK ) : "r1", "memory"
);
}
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Original file line number Diff line number Diff line change
Expand Up @@ -36,21 +36,21 @@ secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandl
/* xSecureContextHandle value is in r0. */
__asm volatile
(
" .syntax unified \n"
" \n"
" mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
" .syntax unified \n"
" \n"
" mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
#if ( configENABLE_MPU == 1 )
" ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
" msr control, r3 \n"/* CONTROL = r3. */
" ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
" msr control, r3 \n"/* CONTROL = r3. */
#endif /* configENABLE_MPU */
" msr psplim, r2 \n"/* PSPLIM = r2. */
" msr psp, r1 \n"/* PSP = r1. */
" \n"
" load_ctx_therad_mode: \n"
" nop \n"
" \n"
" msr psplim, r2 \n"/* PSPLIM = r2. */
" msr psp, r1 \n"/* PSP = r1. */
" \n"
" load_ctx_therad_mode: \n"
" nop \n"
" \n"
::: "r0", "r1", "r2"
);
}
Expand All @@ -61,27 +61,27 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl
/* xSecureContextHandle value is in r0. */
__asm volatile
(
" .syntax unified \n"
" \n"
" mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" mrs r1, psp \n"/* r1 = PSP. */
" .syntax unified \n"
" \n"
" mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" mrs r1, psp \n"/* r1 = PSP. */
#if ( configENABLE_FPU == 1 )
" vstmdb r1!, {s0} \n"/* Trigger the defferred stacking of FPU registers. */
" vldmia r1!, {s0} \n"/* Nullify the effect of the pervious statement. */
" vstmdb r1!, {s0} \n"/* Trigger the defferred stacking of FPU registers. */
" vldmia r1!, {s0} \n"/* Nullify the effect of the pervious statement. */
#endif /* configENABLE_FPU */
#if ( configENABLE_MPU == 1 )
" mrs r2, control \n"/* r2 = CONTROL. */
" stmdb r1!, {r2} \n"/* Store CONTROL value on the stack. */
" mrs r2, control \n"/* r2 = CONTROL. */
" stmdb r1!, {r2} \n"/* Store CONTROL value on the stack. */
#endif /* configENABLE_MPU */
" str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
" movs r1, %0 \n"/* r1 = securecontextNO_STACK. */
" msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */
" msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
" \n"
" save_ctx_therad_mode: \n"
" nop \n"
" \n"
" str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
" movs r1, %0 \n"/* r1 = securecontextNO_STACK. */
" msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */
" msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
" \n"
" save_ctx_therad_mode: \n"
" nop \n"
" \n"
::"i" ( securecontextNO_STACK ) : "r1", "memory"
);
}
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