2) Processor data path

The data path of a processor is path each instruction will take and will vary slightly for different instruction types. The general data path will be as follows:

1. The PC will pass its output (the address of the next instruction) to the MAR.

2. The memory takes the address from the MAR, and passes the instruction located at that address to the MDR.

3. The MDR passes the instruction along to the the IR.

4. The control unit decodes the instruction in the IR and sends out the appropriate control signals to the rest of the components. These also determine the operands to be processed by the ALU

5. The ALU performs the appropriate operation (determined by the control signal sent to it) on the data inputs it receives. The data inputs will come from either data from the registers, or data from a register and a portion of the instruction--once again determined by the control signal sent to it.

6. The ALU output then goes to MAR and to the register file. Depending on the instruction, the ALU output will either be the address that data will be loaded from to write to a register or store the data from a register in (in which case the control will have sent a signal to the MAR to accept the ALU output) or the data to be stored in a register (in which case a MUX will have received a control signal to accept the ALU output to send into the register file). For branch type instructions, the output of the ALU is also used to determine whether to branch or not (i.e. if the output is zero, then branch).

In MIPS, this data path will follow 5 stages:

• Instruction Fetch (IF): Essentially steps 1, 2 and 3 above. The PC will also be incremented during this step.
• Instruction Decode (ID): Steps 3 and 4 above.
• Execute (EX): Step 5 above.
• Memory Access (MA): A portion of step 6 above. This step is specific for load and store type instructions. During this step, the output of the ALU will be sent to the MAR, and then either the data in the corresponding address will be read and sent out via the MDR (load instructions) or the corresponding address will have the data sent in via the MDR written to it (store type instructions). The output of the MDR is MUXed with the output of the ALU and sent to the register file.
• Write Back (WB): During this stage, data is written to either an address in the memory or a register in the register file depending on the instruction type and control signals sent out.