Leading zero count benchmark#60
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LeeCampbell merged 2 commits intoHdrHistogram:masterfrom Jul 17, 2017
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Attached are the benchmark results from an Intel Core i7-4702HQ CPU 2.20GHz Haswell (Dell XPS-15 9530) |
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Adds benchmarks for proposed LZC implementations from @bbarry in #42.
The proposed style can be made to outperform the current implementation for CLR using LegacyJit, however performs poorly on the RyuJit (which appears to be the faster of the Jitters in these benchmarks).
The concept proposed is solid, and in retrospect quite an obvious and elegant solution.
Basically this is a 32bit lzc implmentation, but for value greater than
uint.Maxwe perform right shift of the higher bits, allowing us to reuse the 32 bit code.I was actually surprised that it wasn't faster in the end especially the final revision below.
On the best case it has only (2 branches, 1 lookup, 3 math operations)
The worst case is either 4 branches, 1 lookup and 1 math operation, or, 3 branches 1 lookup and 3 math operations).
I am not sure of the cost of the cast long-> uint.