Intrusive Robotics Delta firmware IR_FW3_11.
Based on VESC firmware 6.05. Compatible with VESC® software.
Requires a rev 2 board. This build uses the rev 2 voltage divider
(VIN_R1 = 68.1 kΩ). On a rev 1 board (43.2 kΩ) it will misreport input and
phase voltages.
Flashing (ST-Link):
st-flash --reset write Delta_IR_FW3_11.bin 0x08000000
On a fresh chip, flash the generic VESC bootloader to 0x080E0000 first.
Changes since IR_FW1_5
Hardware
- Board rev 2 voltage divider —
VIN_R143.2 kΩ → 68.1 kΩ. Shared by the VBAT
sense and all three phase-voltage senses, so all four scale together. Full-scale
sense range 68.1 V → 105.4 V; the 93 VHW_LIM_VINremains the binding limit. - Board NTC beta 3380 K → 4067 K, confirmed by bench measurement 2026-08-31.
The board temperature reading — and therefore the FET derating limits below — is
referenced to a real temperature.
Firmware
- FOC switching frequency 60 kHz → 30 kHz. Fixes an independent-watchdog reset
during the FOC detection "apply settings" step. - FET thermal derating raised: start 85 → 95 °C, cutoff 100 → 115 °C.
- Phase filters now default off (hardware unchanged, still toggleable in VESC Tool).
- Phase-filter max ERPM 4000 → 500.
- Motor temperature sensor defaults to disabled — no motor thermistor is fitted,
and a floating input could otherwise fake a hot reading. - Dead time 60 ns → 40 ns nominal. Note this quantises to DTG=6 → 35.7 ns
actual at 168 MHz. If you are commissioning a new board, scope the switch nodes.
Full detail in CHANGELOG.IR.md.
Checksums (SHA-256)
ac83d530d93ee1ef7b4ed091b7f04ff7dfd188d3e9023cf4e9e6a27fc3894617 Delta_IR_FW3_11.bin
df307ccc70b7a46938e4649be8d1ed943b6e09050270f0b1a0e3205c1291edcb Delta_IR_FW3_11.hex
03dbd482dd3985362b50345b31adfa5ce18742c8aa62a87688793bc9b491d798 Delta_IR_FW3_11_src.zip
Complete corresponding source is this repository at tag IR_FW3_11 (GPL v3);
Delta_IR_FW3_11_src.zip is a snapshot of that tag for convenience.
Not affiliated with or endorsed by Benjamin Vedder or the VESC project.