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Data Pipeline in Ecal and Hcal

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Tom Eichlersmith edited this page Jun 26, 2026 · 2 revisions

Both LDMX Ecal and Hcal share a lot of electronics and chips, so their data pipeline is largely the same. Below is a simple flow chart to give you an idea of how the data flows. A few extra comments:

  • The detector design is obviously different between the Ecal and Hcal, but the basic premise of a analog pulse entering the HGCROC to be digitized is the same. I arbitrarily chose 3 HGCROCs but there could be anywhere from 1 up to 6 connected to a single ECON-D depending on the setup.
  • The "Motherboard" design between the Ecal and Hcal is different but still very similar. The Ecal Single Module Motherboard and Hcal Backplane both make the interconnections between multiple HGCROCs and the ECONs serving them.
  • The optical fiber is the separator between the frontend (on detector) electronics and the backend (off detector) electronics.
  • The "Capture" which copies the data from firmware into software varies depending on the host machine (ZCU or Bittware)
flowchart LR
    subgraph Frontend
        START0[ ] --> |Analog Pulse| roc0[HGCROC] --> |Motherboard| econ[ECON];
        START1[ ] --> |Analog Pulse| roc1[HGCROC] --> |Motherboard| econ;
        START2[ ] --> |Analog Pulse| roc2[HGCROC] --> |Motherboard| econ;
        econ --> |Motherboard| lpgbt[lpGBT];
    end
    subgraph Backend
        lpgbt --> |Optical Fiber| fw[Firmware];
        fw --> |Capture| sw[Software];
    end

style START0 fill-opacity:0, stroke-opacity:0, height:0px;
style START1 fill-opacity:0, stroke-opacity:0, height:0px;
style START2 fill-opacity:0, stroke-opacity:0, height:0px;
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In order to be able to successfully collect data, we need to make sure all of the "pipes" in this data pipeline are well aligned.

  • tasks.setup.phase_word_align -> aligns the HGCROC<->ECON pipes by making sure the HGCROCs and the ECON agree on what a "bit" is (phase alignment) and where new "words" start (word alignment)
  • tasks.setup.align_econ_lpgbt -> aligns the ECON<->lpGBT pipe by making sure the ECON and lpGBT agree what a bit is and where word boundaries are
  • tasks.setup.check_lpgbt_backend -> checks that the lpGBT<->Software pipe is aligned (developed in https://github.com/LDMX-Software/pflib/pull/415)
    • this has not been an identifiable issue until attempting to capture trigger path data, so we haven't looked at it in much detail

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