Verisim IDE v6.1.0 — Embedded EDA Suite & Activity Bar

Verisim IDE v6.1.0 — Self-Contained Desktop EDA Workstation

🚀 Highlights & New Features

• Embedded Portable Toolchain (Zero Host Dependencies): Bundles Yosys 0.66, Berkeley ABC, Icarus Verilog 13.0, VVP, Verilator 5.052, and all runtime libraries directly inside the desktop AppImage.
• Dual-Engine Flexibility: Run completely self-contained out-of-the-box or point to custom host executables (e.g. vendor toolchains like Xilinx Vivado/Quartus).
• Activity Bar & Drawer Navigation: VS Code / modern EDA style left activity rail with quick switching across Explorer, Synthesis, Waveforms, Python Automation, and Toolchain Settings (Ctrl+B / Cmd+B).
• Visual Gate-Level Synthesis Viewer: Live design KPI metrics (wires, ports, gate cells), gate distribution breakdown (AND, OR, XOR/XNOR, DFF), and netlist inspect/export.
• Verilog & SystemVerilog File Import: Open and load .v, .sv, and .svh files into the project workspace with automatic top-module and testbench detection (Ctrl+O / Cmd+O).
• Verilator Simulation & Tracing: Full support for Verilator C++ testbench simulation with VCD trace generation alongside Icarus Verilog.
• 3-Zone Action Hub Toolbar: Streamlined, professional EDA workspace toolbar.

📦 Assets

• verisim-ide_6.1.0_amd64.AppImage (Standalone executable for Linux x86_64, zero installation required)