Skip to content

Releases: MarcosAsh/protocol-emulator

Board evidence 2026-10-08/09 and gds run 37784264723

Choose a tag to compare

@MarcosAsh MarcosAsh released this 09 Oct 18:14

Board evidence from 2026-10-08 and 2026-10-09, and the gds run behind main 4161204, kept here because CI artifacts expire before the deadline.

Asset Contents
board-evidence-2026-10-08-09.tar.gz 2026-10-08/kernel-vs-board/: 2,542 delay variants on the Icepi Zero v1.3, main and on-chip kernel bitstreams. 2026-10-09/ledger/: the demo ledger on main's bitstream. SHA256SUMS covers every file.
gds-main-4161204-run37784264723.tar.gz metrics, precheck reports, submission stats, final GDS, LEF and gate-level netlist, gate-level results, render and job logs of run 37784264723
icepi-main-4161204-v1.3-seed2.bit main 4161204
icepi-onchip-kernel-e477eb0-v1.3-seed2.bit onchip-kernel e477eb0
SHA256SUMS the assets above

v0.2.0

Choose a tag to compare

@github-actions github-actions released this 04 Oct 12:31

The chip is from gds run 37057332380 at 3acc082.
Assemble and check firmware with no OCaml: chmod +x generate-linux-x86_64 && ./generate-linux-x86_64 assemble uart_tx.asm

Both bitstreams are built from this tag, whose Verilog is the one that gds run hardened, and the ocaml workflow's fpga job simulated their netlists.

icepi-zero-v1.4.bit is the chip's Verilog, two engines at 48 MHz, for an Icepi Zero v1.3 or v1.4 (ECP5), its pins on the 40-pin header as icepi/header.lpf maps them and USB on the first USB-C port. Load it with openFPGALoader -b icepi-zero icepi-zero-v1.4.bit, as make -C icepi prog does, and add --write-flash to keep it. v1.0 to v1.2 take the clock on another ball: make -C icepi REV=v1.2.

tt_um_marcosash_protocol_emulator.bin is one engine with flop program memory, to fit the iCE40 UP5K on Tiny Tapeout's classic (TT04) FPGA breakout, pins as tt-support-tools' fpga/tt_fpga_top.pcf. Copy it to the demo board with mpremote cp tt_um_marcosash_protocol_emulator.bin :/bitstreams/, reset the board, select it with tt.shuttle.tt_um_marcosash_protocol_emulator.enable() and clock it at 16 MHz or less.

v0.1.0

Choose a tag to compare

@github-actions github-actions released this 30 Sep 18:59

The chip is from gds run 36615334436 at 77d2350. Assemble and check firmware
with no OCaml: chmod +x generate-linux-x86_64 && ./generate-linux-x86_64 assemble uart_tx.asm