v1.13.0

Asymmetric antenna-path channel sounding is supported as shipped in this
release. The 1-antenna initiator presets ship with 4 antenna paths
(*_cent_a1_4), so every initiator↔reflector antenna pairing the shipped
presets can form — 1↔1 (A1_B1), 1↔2 (A1_B2), 2↔1 (A2_B1), 2↔2 (A2_B2) —
passes the controller's antenna-config validation.
Previously every asymmetric pair was rejected at Set Procedure Parameters on
both devices (HCI 0x0d) and no channel sounding ran (#134); the controller
itself was never the problem (#135). Spec: #139.

Preset renames — scripted build flows must move. The *_cent_a1_1
initiator preset names are gone: ublox, fanstel, and minew (plus their _ipt
twins) are renamed to *_cent_a1_4 on the 4-path/1-antenna fragment, and
nrf54l15dk_cent_a1_1 is dropped in favour of the pre-existing
nrf54l15dk_cent_a1_4. Scripts and CI invocations that name presets must
switch from _a1_1 to _a1_4; the full shipped matrix is
docs/hardware.md.
Local build directories (build_<preset>) move with the renames.

Known issue (#138) — the nRF54L15 TAG reflector can freeze under sustained
asymmetric ranging: sporadic, observed ~2–15 min into a session (#135). The
session tears down by design and auto-recovers without re-flashing: the
initiator sees RAS serialization stop, then the supervision-timeout disconnect
(reason 0x08) a few seconds later, and the devices come back through the
designed recovery path — the disconnect-callback cold reboot
(common/ble_callbacks.c) and the CS liveness watchdog (#116). Root cause
under investigation in #138; it does not gate this release.

Verification status (#141): the fixed asymmetric pair (nrf54l15dk_cent_a1_4
↔ nrf54l15tag_peri_a2_4, A1_B2, 1882 frames) is bench-verified, as are the
2↔1 (A2_B1, 482) and 1↔1 (A1_B1, 1413) regression legs. The trio's 2↔2 leg
ran on the Ezurio a2_4 ↔ a2_4 pair (A2_B2, 4 paths, 524) — the spec'd DK
pair is impossible with shipped presets (#145 tracks the missing
nrf54l15dk_peri_a2_4). Genuine 1↔4 (A1_B4) is logic-verified only — no
4-antenna peer exists on the bench. The non-DK board presets are
build-verified only (no bench hardware), and the IPT path had no bench run
in this effort.

What's Changed

• Feat/asymmetric cs pairs by @AttilaRoemer in #144

Full Changelog: v1.12.0...v1.13.0