feat(pmp): extend to 64 entries with configurable NUM_ENTRIES

[cphurley82]

Add a size_t NUM_ENTRIES = 64 non-type template parameter to pmp<PLAT> so the number of PMP entries is set at instantiation time with no runtime overhead. The default of 64 matches the RISC-V Privileged Architecture Spec v20260120. Passing a smaller value (e.g. 8) models a core that implements fewer hardware PMP entries.

New rv64gc_mp_8 ISA variant (8 entries):

• vm_rv64gc_mp.cpp: add rv64gc_mp_8_hart struct and register "rv64gc_mp_8:interp" with core_factory (standalone riscv-sim)
• register_cores.cpp: register "rv64gc_mp_8:interp" with iss_factory (SystemC VP / core_complex)

Firmware tests (contrib/fw/):

• pmp-64entry-addr-test: write/read pmpaddr32 (CSR 0x3D0); confirms entries 16-63 are accessible
• pmp-64entry-cfg-test: write/read/clear pmpcfg4 (CSR 0x3A4, entries 32-39 on RV64); confirms persistence
• pmp-8entry-guard-test: configure entry 0 deny region and expect load-access fault using rv64gc_mp_8; confirms enforcement still works with the 8-entry window

[eyck]

LGTM

I'm not a fan of the hard-coded parameters. But as long as we do not have a generic mechanism to pass parameters, it is the only way to do it.

[eyck]

@cphurley82 Many THX