Fix missing proxy fences around TMA accesses - #25
Merged
Merged
Conversation
- add fence_view_async_shared() after generic smem writes that are later read by TMA stores: fp32 state conversion path, and the zero-init state path (reachable when t_tiles == 0 for empty varlen sequences, where the main loop's per-iteration fence never runs) - add fence_barrier_init() after mbarrier.init for the standalone transaction barriers (kernel1 tma_load_barrier, kernel2 state_acc_tma_barrier x2), matching CUTLASS PipelineTmaAsync Closes #24 Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
esp0r
added a commit
that referenced
this pull request
Jul 29, 2026
- add fence_view_async_shared() after generic smem writes that are later read by TMA stores: fp32 state conversion path, and the zero-init state path (reachable when t_tiles == 0 for empty varlen sequences, where the main loop's per-iteration fence never runs) - add fence_barrier_init() after mbarrier.init for the standalone transaction barriers (kernel1 tma_load_barrier, kernel2 state_acc_tma_barrier x2), matching CUTLASS PipelineTmaAsync Closes #24
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
Fixes the missing cross-proxy fences reported in #24 (found by auditing the SM90 forward kernels against the PTX ISA proxy model):
fwd_kernel2.cuh— FP32 state store:smem_cvt_bf16_to_fp32()writesstate_fp32_bufvia the generic proxy, but only__syncthreads()separated it from the TMA store (async proxy). Addedfence_view_async_shared()executed by all writing threads before the rendezvous — same pattern as the existing per-iteration fence beforeproducer_commit.fwd_kernel2.cuh— zero-init state (HasStateIn=false): with an empty sequence (t_tiles == 0, reachable in varlen batches) the main loop never runs, so no fence ever covered the generic zero-init writes before the BF16 TMA state store → stale smem could be written tofinal_state. Addedfence_view_async_shared()before the__syncthreads().fwd_kernel1.cuh/fwd_kernel2.cuh— 3 standalone mbarriers:mbarrier.init(generic write) was used by TMA complete-tx (async proxy RMW) withoutfence.mbarrier_init. Addedfence_barrier_init()after each init, matchingCUTLASS PipelineTmaAsync::init_barriers.All changes are writer-side fences placed immediately after the last write and before the existing rendezvous (
__syncthreads/ barrier arrive), per the PTX generic→async publication pattern. 6 lines added, no other changes.Test
python setup.py build_ext --inplace— clean build (CUDA 13.0, torch 2.9.1)python tests/test_fwd.py— fixed-length and varlen cases both bit-exact vs torch reference (avg/max rtol/atol = 0.0)Closes #24