this is the verilog code of final project for digital system design course. in this project i simulate controller of an elevator.
The following software were used to write this program
- Modelsim
- Visual Studio
System Verilog
In this program, according to the logic required for an elevator in a five-story building, the required modules have been designed
To run this program, a project must first be created in the Modelsim and then the designed files must be added to the project.
After that, by using Simulation Button and then start simulation and then selecting work folder, we select the module designed in the test, which can be seen in this section, to enter Simulation window.
After entering this section, if there is no error, the output will be displayed in the terminal by pressing the RunAll button.
after simulation we can see this result in the terminal:
- mohammad hasan bayatiany
- STU_ID: 401105691
spring 2024