Skip to content

v1.0.0

Latest

Choose a tag to compare

@MrJake222 MrJake222 released this 19 Nov 23:07
· 13 commits to master since this release
f4fafe2

Upload to FPGA's SRAM using:

./upload.sh fogml-riscv.hex

upload.sh is a part of my debug uart project. Adjust PORT values (though it should be okay if no other ttyACM devices are present). It doesn't need compilation (Python/Bash scripting).

Send mock data as described in the README.