[None][perf] Validate GPT-OSS transceiver v2 performance by nv-xtf · Pull Request #15765 · NVIDIA/TensorRT-LLM

nv-xtf · 2026-06-30T08:00:21Z

Description

Migrate existing NIXL-based GPT-OSS disaggregated tests from Transceiver V1 to V2 (transceiver_runtime: PYTHON).

This PR updates the accuracy, stress, and performance test configurations. Performance tests continue to use KV cache manager v1. A separate V1 test lane is not retained.

Performance Validation

Run the existing GB200 GPT-OSS perf-sanity cases and compare the V2 pre-merge results with the historical V1 post-merge baseline.

Performance results

No regression was observed in the two E2E cases.
No V2-specific regression was observed in the generation-performance cases.
The 1k1k con64 result matches the post-merge level observed after its
June 29 unwaive, indicating that its stored baseline is stale.

PR Checklist

Please review the following before submitting your PR:

PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.
PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.
Test cases are provided for new code paths (see test instructions)
If PR introduces API changes, an appropriate PR label is added - either api-compatible or api-breaking. For api-breaking, include BREAKING in the PR title.
Any new dependencies have been scanned for license and vulnerabilities
CODEOWNERS updated if ownership changes
Documentation updated as needed
Update tava architecture diagram if there is a significant design change in PR.
The reviewers assigned automatically/manually are appropriate for the PR.
Please check this after reviewing the above items as appropriate for this PR.

GitHub Bot Help

To see a list of available CI bot commands, please comment /bot help.

Summary by CodeRabbit

Tests
- Updated several performance sanity benchmark configurations to explicitly use the legacy KV cache manager setting and set cache transceiver runtime to Python for both generation and context workers.
- Applied these settings across multiple disaggregated benchmark scenarios to keep test runs consistent.

nv-xtf · 2026-06-30T08:10:51Z

/bot run --stage-list "GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-4"

tensorrt-cicd · 2026-06-30T08:17:15Z

PR_Github #56561 [ run ] triggered by Bot. Commit: 0879b1b Link to invocation

tensorrt-cicd · 2026-06-30T09:08:23Z

PR_Github #56561 [ run ] completed with state SUCCESS. Commit: 0879b1b
/LLM/main/L0_MergeRequest_PR pipeline #45396 (Partly Tested) completed with status: 'SUCCESS'

CI Report

Link to invocation

coderabbitai · 2026-07-02T05:47:12Z

📝 Walkthrough

Walkthrough

Seven disaggregated perf-sanity benchmark YAML configuration files are updated to explicitly set use_kv_cache_manager_v2: false in kv_cache_config and transceiver_runtime: PYTHON in cache_transceiver_config for both gen and ctx worker sections.

Changes

Disaggregated perf-sanity YAML config updates

Layer / File(s)	Summary
KV cache manager and transceiver runtime overrides `tests/scripts/perf-sanity/disaggregated/gb200_gpt-oss-120b-fp4_1k1k_con2048_...NIXL.yaml`, `..._1k1k_con512_...NIXL.yaml`, `..._1k1k_con64_...NIXL.yaml`, `..._8k1k_con1024_...NIXL.yaml`, `..._8k1k_con128_...NIXL.yaml`, `..._8k1k_con4_...NIXL.yaml`, `..._8k1k_con512_...NIXL.yaml`	Each file adds `use_kv_cache_manager_v2: false` under `worker_config.gen.kv_cache_config` and `worker_config.ctx.kv_cache_config`, and adds `transceiver_runtime: PYTHON` under `worker_config.gen.cache_transceiver_config` and `worker_config.ctx.cache_transceiver_config`.

Estimated code review effort: 1 (Trivial) | ~5 minutes

Possibly related PRs

NVIDIA/TensorRT-LLM#14933: Both PRs configure use_kv_cache_manager_v2 and cache_transceiver_config.transceiver_runtime in disaggregated test YAML configs.

Suggested reviewers: Tabrizian, schetlur-nv, chang-l, kaiyux

🚥 Pre-merge checks | ✅ 5

✅ Passed checks (5 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title matches the PR’s main focus on validating GPT-OSS transceiver v2 performance in perf-sanity configs.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Description check	✅ Passed	The PR description follows the template well and clearly states the change, validation, and checklist, with only the Test Coverage section omitted.

✨ Finishing Touches

🧪 Generate unit tests (beta)

Create PR with unit tests

_{Comment @coderabbitai help to get the list of available commands.}

nv-xtf · 2026-07-02T05:51:08Z

/bot run --stage-list "GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-4,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-7"

tensorrt-cicd · 2026-07-02T05:57:23Z

PR_Github #57139 [ run ] triggered by Bot. Commit: 6ccaf61 Link to invocation

tensorrt-cicd · 2026-07-02T07:02:50Z

PR_Github #57139 [ run ] completed with state SUCCESS. Commit: 6ccaf61
/LLM/main/L0_MergeRequest_PR pipeline #45921 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

Please check the failed tests and fix your PR
If you cannot view the failures, ask the CI triggerer to share details
Once fixed, request an NVIDIA team member to trigger CI again

CI Agent Failure Analysis

Link to invocation

nv-xtf · 2026-07-02T07:06:33Z

/bot run --stage-list "GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-4,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-6,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-7"

tensorrt-cicd · 2026-07-02T07:13:31Z

PR_Github #57157 [ run ] triggered by Bot. Commit: 6ccaf61 Link to invocation

tensorrt-cicd · 2026-07-02T08:32:13Z

PR_Github #57157 [ run ] completed with state FAILURE. Commit: 6ccaf61
/LLM/main/L0_MergeRequest_PR pipeline #45936 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

Please check the failed tests and fix your PR
If you cannot view the failures, ask the CI triggerer to share details
Once fixed, request an NVIDIA team member to trigger CI again

CI Agent Failure Analysis

Link to invocation

nv-xtf · 2026-07-03T02:14:58Z

/bot run --stage-list "GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-4,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-6,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-7"

tensorrt-cicd · 2026-07-03T02:20:31Z

PR_Github #57306 [ run ] triggered by Bot. Commit: 6ccaf61 Link to invocation

tensorrt-cicd · 2026-07-03T02:31:08Z

PR_Github #57306 [ run ] completed with state FAILURE. Commit: 6ccaf61
/LLM/main/L0_MergeRequest_PR pipeline #46066 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

Please check the failed tests and fix your PR
If you cannot view the failures, ask the CI triggerer to share details
Once fixed, request an NVIDIA team member to trigger CI again

CI Agent Failure Analysis

Link to invocation

nv-xtf · 2026-07-03T02:37:19Z

/bot run --stage-list "GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-4,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-6,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-7"

tensorrt-cicd · 2026-07-03T02:43:24Z

PR_Github #57320 [ run ] triggered by Bot. Commit: 7a77462 Link to invocation

tensorrt-cicd · 2026-07-03T03:44:16Z

PR_Github #57320 [ run ] completed with state FAILURE. Commit: 7a77462
/LLM/main/L0_MergeRequest_PR pipeline #46077 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

Please check the failed tests and fix your PR
If you cannot view the failures, ask the CI triggerer to share details
Once fixed, request an NVIDIA team member to trigger CI again

CI Agent Failure Analysis

Link to invocation

Signed-off-by: Tingfeng Xian <289617005+nv-xtf@users.noreply.github.com>

…iver v2 Signed-off-by: Tingfeng Xian <289617005+nv-xtf@users.noreply.github.com>

Enable KV cache manager v1 (use_kv_cache_manager_v2: false) and NIXL transceiver v2 Python runtime (transceiver_runtime: PYTHON) for both context and generation workers across the Kimi-K2.5-thinking-fp4 disaggregated perf-sanity configs on GB200 and GB300, mirroring the GPT-OSS validation in PR NVIDIA#15765. Signed-off-by: Shixiaowei02 <39303645+Shixiaowei02@users.noreply.github.com>

…iver v2 Signed-off-by: Tingfeng Xian <289617005+nv-xtf@users.noreply.github.com>

nv-xtf · 2026-07-06T07:54:30Z

/bot run --stage-list "DGX_B200-4_GPUs-PyTorch-1,DGX_B200-4_GPUs-PyTorch-2,DGX_B200-4_GPUs-PyTorch-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-"

tensorrt-cicd · 2026-07-06T08:01:57Z

PR_Github #57728 [ run ] triggered by Bot. Commit: aaae166 Link to invocation

tensorrt-cicd · 2026-07-06T10:21:21Z

PR_Github #57728 [ run ] completed with state SUCCESS. Commit: aaae166
/LLM/main/L0_MergeRequest_PR pipeline #46437 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

Please check the failed tests and fix your PR
If you cannot view the failures, ask the CI triggerer to share details
Once fixed, request an NVIDIA team member to trigger CI again

CI Agent Failure Analysis

Link to invocation

nv-xtf · 2026-07-07T01:58:27Z

/bot run --stage-list "DGX_B200-4_GPUs-PyTorch-1,DGX_B200-4_GPUs-PyTorch-2,DGX_B200-4_GPUs-PyTorch-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-"

tensorrt-cicd · 2026-07-07T02:04:41Z

PR_Github #57885 [ run ] triggered by Bot. Commit: aaae166 Link to invocation

tensorrt-cicd · 2026-07-07T02:17:32Z

PR_Github #57885 [ run ] completed with state FAILURE. Commit: aaae166
/LLM/main/L0_MergeRequest_PR pipeline #46580 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

Please check the failed tests and fix your PR
If you cannot view the failures, ask the CI triggerer to share details
Once fixed, request an NVIDIA team member to trigger CI again

CI Agent Failure Analysis

Link to invocation

nv-xtf · 2026-07-07T02:32:07Z

/bot run --stage-list "DGX_B200-4_GPUs-PyTorch-1,DGX_B200-4_GPUs-PyTorch-2,DGX_B200-4_GPUs-PyTorch-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-4,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-6,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-7"

tensorrt-cicd · 2026-07-07T02:37:46Z

PR_Github #57894 [ run ] triggered by Bot. Commit: aaae166 Link to invocation

nv-xtf · 2026-07-07T06:08:12Z

/bot kill

tensorrt-cicd · 2026-07-07T06:13:51Z

PR_Github #57953 [ kill ] triggered by Bot. Commit: aaae166 Link to invocation

tensorrt-cicd · 2026-07-07T06:14:01Z

PR_Github #57894 [ run ] completed with state ABORTED. Commit: aaae166

Link to invocation

tensorrt-cicd · 2026-07-07T06:14:06Z

PR_Github #57953 [ kill ] completed with state SUCCESS. Commit: aaae166
Successfully killed previous jobs for commit aaae166

Link to invocation

nv-xtf · 2026-07-07T06:28:41Z

/bot run --stage-list "DGX_B200-4_GPUs-PyTorch-1,DGX_B200-4_GPUs-PyTorch-2,DGX_B200-4_GPUs-PyTorch-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge-4,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-1,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-2,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-3,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-6,GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge-7"

tensorrt-cicd · 2026-07-07T06:36:40Z

PR_Github #57959 [ run ] triggered by Bot. Commit: aaae166 Link to invocation

tensorrt-cicd · 2026-07-07T08:06:18Z

PR_Github #57959 [ run ] completed with state SUCCESS. Commit: aaae166
/LLM/main/L0_MergeRequest_PR pipeline #46637 (Partly Tested) completed with status: 'SUCCESS'

CI Report

Link to invocation

fredricz-20070104 · 2026-07-07T08:17:08Z

One question on the perf disagg configs before this merges.

Under tests/scripts/perf/disaggregated/ there are two gpt-oss UCX variants that this PR (correctly) leaves untouched, since transceiver_runtime: PYTHON is only valid for the DEFAULT/NIXL backends and would raise ValueError under UCX:

gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml
gb200_gpt-oss-120b-fp4_8k1k_con1024_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml

The net effect is that after this PR the gpt-oss perf coverage is split: the NIXL cases move to the V2 / PYTHON transceiver, while these two UCX cases stay on CPP / KV cache v1.

Is keeping these UCX variants intentional (we still want CPP/UCX perf coverage for gpt-oss), or should they be removed so gpt-oss perf standardizes on the NIXL + PYTHON path? Just want to confirm this split is deliberate and not an oversight.

fredricz-20070104

Approved.

nv-xtf · 2026-07-07T08:42:56Z

/bot skip --comment "Targeted GPT-OSS Harmony and perf-sanity tests passed."

tensorrt-cicd · 2026-07-07T08:48:18Z

PR_Github #57977 [ skip ] triggered by Bot. Commit: aaae166 Link to invocation

tensorrt-cicd · 2026-07-07T09:01:04Z

PR_Github #57977 [ skip ] completed with state SUCCESS. Commit: aaae166
Skipping testing for commit aaae166

Link to invocation

Enable the NIXL transceiver v2 Python runtime (transceiver_runtime: PYTHON) for both context and generation workers across the Kimi-K2.5-thinking-fp4 disaggregated perf-sanity configs on GB200 and GB300, mirroring the GPT-OSS validation in PR NVIDIA#15765. KV cache manager v2 (the default) is kept enabled. Signed-off-by: Shixiaowei02 <39303645+Shixiaowei02@users.noreply.github.com>

Signed-off-by: Tingfeng Xian <289617005+nv-xtf@users.noreply.github.com>

Enable the NIXL transceiver v2 Python runtime (transceiver_runtime: PYTHON) for both context and generation workers across the Kimi-K2.5-thinking-fp4 disaggregated perf-sanity configs on GB200 and GB300, mirroring the GPT-OSS validation in PR NVIDIA#15765. KV cache manager v2 (the default) is kept enabled. Signed-off-by: Shixiaowei02 <39303645+Shixiaowei02@users.noreply.github.com>

github-actions Bot assigned nv-xtf Jun 30, 2026

nv-xtf changed the title ~~perf/gpt-oss-transceiver-v2~~ [None][perf] Validate GPT-OSS transceiver v2 performance Jun 30, 2026

nv-xtf force-pushed the perf/gpt-oss-transceiver-v2 branch from 42b8d28 to 6ccaf61 Compare July 2, 2026 05:46

nv-xtf force-pushed the perf/gpt-oss-transceiver-v2 branch from 6ccaf61 to 7a77462 Compare July 3, 2026 02:33

nv-xtf added 2 commits July 6, 2026 11:14

[None][perf] validate GPT-OSS transceiver v2

1f3ca7d

Signed-off-by: Tingfeng Xian <289617005+nv-xtf@users.noreply.github.com>

[None][perf] migrate remaining GPT-OSS perf sanity configs to transce…

6199434

…iver v2 Signed-off-by: Tingfeng Xian <289617005+nv-xtf@users.noreply.github.com>

nv-xtf force-pushed the perf/gpt-oss-transceiver-v2 branch from 7a77462 to 6199434 Compare July 6, 2026 03:16

Shixiaowei02 mentioned this pull request Jul 6, 2026

[None][perf] Validate Kimi-K2.5 transceiver v2 performance #15966

Draft

1 task

[None][perf] migrate remaining GPT-OSS perf sanity configs to transce…

aaae166

…iver v2 Signed-off-by: Tingfeng Xian <289617005+nv-xtf@users.noreply.github.com>

nv-xtf requested review from a team as code owners July 6, 2026 07:51

nv-xtf requested review from Shixiaowei02 and chuangz0 July 6, 2026 08:03

Shixiaowei02 approved these changes Jul 7, 2026

View reviewed changes

fredricz-20070104 approved these changes Jul 7, 2026

View reviewed changes

crazydemo approved these changes Jul 7, 2026

View reviewed changes

nv-xtf merged commit ce67288 into NVIDIA:main Jul 7, 2026
10 checks passed

BrianLi23 pushed a commit to BrianLi23/TensorRT-LLM that referenced this pull request Jul 9, 2026

[None][perf] Validate GPT-OSS transceiver v2 performance (NVIDIA#15765)

be35a8c

Signed-off-by: Tingfeng Xian <289617005+nv-xtf@users.noreply.github.com>

Uh oh!

Conversation

nv-xtf commented Jun 30, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Description

Performance Validation

PR Checklist

GitHub Bot Help

Summary by CodeRabbit

Uh oh!

nv-xtf commented Jun 30, 2026

Uh oh!

tensorrt-cicd commented Jun 30, 2026

Uh oh!

tensorrt-cicd commented Jun 30, 2026

Uh oh!

coderabbitai Bot commented Jul 2, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Walkthrough

Changes

Uh oh!

nv-xtf commented Jul 2, 2026

Uh oh!

tensorrt-cicd commented Jul 2, 2026

Uh oh!

tensorrt-cicd commented Jul 2, 2026

Uh oh!

nv-xtf commented Jul 2, 2026

Uh oh!

tensorrt-cicd commented Jul 2, 2026

Uh oh!

tensorrt-cicd commented Jul 2, 2026

Uh oh!

nv-xtf commented Jul 3, 2026

Uh oh!

tensorrt-cicd commented Jul 3, 2026

Uh oh!

tensorrt-cicd commented Jul 3, 2026

Uh oh!

nv-xtf commented Jul 3, 2026

Uh oh!

tensorrt-cicd commented Jul 3, 2026

Uh oh!

tensorrt-cicd commented Jul 3, 2026

Uh oh!

nv-xtf commented Jul 6, 2026

Uh oh!

tensorrt-cicd commented Jul 6, 2026

Uh oh!

tensorrt-cicd commented Jul 6, 2026

Uh oh!

nv-xtf commented Jul 7, 2026

Uh oh!

tensorrt-cicd commented Jul 7, 2026

Uh oh!

tensorrt-cicd commented Jul 7, 2026

Uh oh!

nv-xtf commented Jul 7, 2026

Uh oh!

tensorrt-cicd commented Jul 7, 2026

Uh oh!

nv-xtf commented Jul 7, 2026

Uh oh!

tensorrt-cicd commented Jul 7, 2026

Uh oh!

tensorrt-cicd commented Jul 7, 2026

Uh oh!

tensorrt-cicd commented Jul 7, 2026

Uh oh!

nv-xtf commented Jul 7, 2026

Uh oh!

tensorrt-cicd commented Jul 7, 2026

Uh oh!

tensorrt-cicd commented Jul 7, 2026

Uh oh!

fredricz-20070104 commented Jul 7, 2026

Uh oh!

fredricz-20070104 left a comment

Choose a reason for hiding this comment

Uh oh!

nv-xtf commented Jun 30, 2026 •

edited

Loading

coderabbitai Bot commented Jul 2, 2026 •

edited

Loading