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[https://nvbugs/6428057][fix] Propagate host stop criteria across PP ranks#16131

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chienchunhung wants to merge 2 commits into
NVIDIA:mainfrom
chienchunhung:codex/wave3-pp-lifecycle-fix
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[https://nvbugs/6428057][fix] Propagate host stop criteria across PP ranks#16131
chienchunhung wants to merge 2 commits into
NVIDIA:mainfrom
chienchunhung:codex/wave3-pp-lifecycle-fix

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@chienchunhung

@chienchunhung chienchunhung commented Jul 8, 2026

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Description

PR #15920 (4f1c3cd) added a host-side stop-criteria fast path for greedy TorchSampler requests. On the last pipeline-parallel rank, that path sets SampleStateTorch.use_host_stop_criteria=True and deliberately leaves device finish_reasons unset. The PP sample-state ring only forwarded sample_state.host and result diffs, so receiving ranks kept the default False value and entered the device-finish-reason update path with missing state.

This mismatch caused the PP worker failures reported after post-merge 2826. The failures landed in the same regression window as #15386, but the responsible change is #15920; this PR does not modify the staged post-load or MoE lifecycle.

The four NVBug records map to three unique waived tests:

Changes

  • Forward use_host_stop_criteria with the PP sample-state ring payload.
  • Restore the flag only for sampler states that declare it; other sampler flavors forward False without being mutated.
  • Add CPU regression coverage for source, relay, and terminal PP ranks.
  • Add coverage for sampler states without use_host_stop_criteria.
  • Remove the three unique test waivers associated with the four NVBug records.

Test Coverage

Local:

  • TensorRT-LLM pre-commit and commit-time DCO hooks passed for all changed files.
  • The focused pytest module could not load locally because the environment lacks the full TensorRT-LLM Python dependency set (transformers).

Targeted CI:

/bot run --disable-fail-fast --extra-stage "DGX_B200-4_GPUs-PyTorch-Post-Merge-1, DGX_B200-4_GPUs-PyTorch-Post-Merge-2, GB300-4_GPUs-PyTorch-Post-Merge-3" --detailed-log

PR_Github #58288 was launched on the initial fix commit dd211ea. These stages execute the exact unwaived DeepSeek TP2/PP2, DeepSeek PP4, and Nemotron-H LoRA PP2 regressions. The follow-up commit adds only the non-Torch compatibility guard and its CPU regression test; no additional GPU run has been requested yet.

Impact

The payload is internal to a homogeneous PP worker group. Torch sampler ranks preserve the host-stop decision, while non-Torch sampler states retain their existing behavior.

Related PRs

…ranks

Signed-off-by: Chien-Chun Hung <2679986+chienchunhung@users.noreply.github.com>

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/bot run --disable-fail-fast --extra-stage "DGX_B200-4_GPUs-PyTorch-Post-Merge-1, DGX_B200-4_GPUs-PyTorch-Post-Merge-2, GB300-4_GPUs-PyTorch-Post-Merge-3" --detailed-log

@tensorrt-cicd

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PR_Github #58288 [ run ] triggered by Bot. Commit: dd211ea Link to invocation

Signed-off-by: Chien-Chun Hung <2679986+chienchunhung@users.noreply.github.com>

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Closing this draft to avoid duplication and reviewer confusion. PR #16096 will remain the canonical path for root-cause ownership, the fix, waiver cleanup, and verification.

@tensorrt-cicd

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PR_Github #58288 [ run ] completed with state SUCCESS. Commit: dd211ea
/LLM/main/L0_MergeRequest_PR pipeline #46923 completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

  • Please check the failed tests and fix your PR
  • If you cannot view the failures, ask the CI triggerer to share details
  • Once fixed, request an NVIDIA team member to trigger CI again

CI Agent Failure Analysis

Link to invocation

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