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[libedit] Register signal handler with SA_ONSTACK flag.#40

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tkoeppe wants to merge 1 commit intoNetBSD:trunkfrom
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[libedit] Register signal handler with SA_ONSTACK flag.#40
tkoeppe wants to merge 1 commit intoNetBSD:trunkfrom
tkoeppe:onstack

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@tkoeppe
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@tkoeppe tkoeppe commented Aug 8, 2024

This allows the handler to use the alternate signal stack if one is available in the handling thread, but has no effect otherwise.

This change makes the signal handler respect existing choices better. Specifically, this allows signal handlers to be set when the process includes a Go runtime, since Go enforces that all signal handlers in the process use the SA_ONSTACK flag (e.g. see golang/go#20400).

This allows the handler to use the alternate signal stack if one is
available in the handling thread, but has no effect otherwise.

This change makes the signal handler respect existing choices better.
Specifically, this allows signal handlers to be set when the process
includes a Go runtime, since Go enforces that _all_ signal handlers in
the process use the SA_ONSTACK flag (e.g. see golang/go#20400).
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zoulasc commented Dec 18, 2024

Committed, thanks.

@zoulasc zoulasc closed this Dec 18, 2024
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tkoeppe commented Dec 18, 2024

Nice, thanks a lot!

@tkoeppe tkoeppe deleted the onstack branch December 18, 2024 15:43
netbsd-srcmastr pushed a commit that referenced this pull request Oct 1, 2025
	sys/arch/arm/include/cpufunc.h: revision 1.92
	sys/arch/arm/arm32/bus_dma.c: revision 1.150

arm: Adjust barriers issued in bus_dmamap_sync for the coherent case.
PR/59654

This change adjusts the memory barriers issued by bus_dmamap_sync for
the coherent case. In the non-coherent case the CPU cache operations
are expected to provide any, and all required barriers.
These barriers are emitted after bouncing for PREWRITE and before
bouncing for POSTREAD.

A new indrection is introduced to deal with the differencs in barrier
(dsb) options between Arm V8 and V7, the lack of options in Arm V6,
and the need to use cpu_drain_writebuf for all other earlier versions.

The Arm V8 Net change is:
op                      old                     new
---------------------   ----------------------  ------------
PREREAD                 none                    dsb(osh)
PREWRITE                cpu_drain_writebuf      dsb(oshst)
PREREAD|PREWRITE        cpu_drain_writebuf      dsb(osh)
POSTREAD                cpu_drain_writebuf      dsb(oshld)
POSTWRITE               none                    none
POSTREAD|POSTWRITE      cpu_drain_writebuf      dsb(oshld)
where cpu_drain_writebuf is a dsb(sy) or CPU equivalent.
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2 participants