What's changed
Security
vector_erf_neon (shipped since v1.5.0) was found to be a near-verbatim port of glibc's LGPL-2.1+ erf_advsimd.c. It was replaced with an independently authored clean-room implementation (local Taylor expansion with a compensated hi/lo table), built with zero access to the prior code or the glibc source. The replacement carries no third-party license obligations and is strictly more accurate: max 1 ULP (was ~2.29 ULP), 7.1–7.4x speedup (on par with the ~8.0x it replaced). See docs/NEON_ERF_DERIVATION.md / NEON_ERF_DIVERGENCE_AUDIT.md.
Added
- Clean-room
vector_exp_neon: tail-corrected N=128 table + order-5 polynomial kernel. <1 ULP accuracy, ~20–27% faster than the prior SLEEF polynomial. - Clean-room
vector_log_neon: compensated (L_hi, L_lo) table kernel. Max 0.52 ULP (was 2.0), 1.74x scalar (was 1.28x). - Clean-room
vector_cos_neon: quadrant-reduction kernel fixing sign errors near k·π/2 in the prior 7-term Taylor kernel (was ~6e8 ULP in [-2π, 2π]) — a correctness fix for the Von Mises PDF/CDF path. New kernel: max 0.78 ULP.
Fixed
- x86
vector_exp_*subnormal underflow (SSE2/AVX/AVX2/AVX-512): deep-negative inputs now flush gracefully through subnormals to +0 (previously clamped at -708.0, up to ~6.7e15 ULP error); also fixes incorrect+inffor x > ~709.44. - x86
vector_exp_*non-finite edge cases:NaN/overflow now correctly propagate instead of clamping to a finite value, matchingstd::exp. vector_log_sse2subnormal inputs (#74): ported the subnormal-input 2^54 scaling step already present in AVX/AVX2/AVX-512.- AVX-512
vector_exp/vector_cosrounding: added the missing_MM_FROUND_NO_EXCbit for parity with the other three x86 tiers. - Windows/MSVC
LIBSTATS_MAX_SIMD_TIERlink failures: the global/arch:flag now cascades AVX-512 → AVX2 → AVX → SSE2, fixingLNK2019errors when capping the compiled tier below AVX-512.
Removed
- Stale
vector_erfcSIMD stub (unused; no batch path callserfc()directly). Scalarerfc()is retained.
Validation
46/46 correctness tests pass on Kaby Lake AVX2+FMA, Mac Mini M1 NEON, and Asus TUF A16 AVX-512. All four x86 SIMD tiers (AVX-512, AVX2, AVX, SSE2) are now natively validated on both x86 machines.
Full changelog: https://github.com/OldCrow/libstats/blob/main/CHANGELOG.md