OpenRX Rev 2.1

Rev 2.1: the rev2 boards, refreshed sets. No electrical change against the
manufactured rev2: PCB diffs are zone refills and priority renumbering.

• Fab sets Lite_rev2, Lite-UFL_rev2, Mono_rev2, Gemini_rev2, each
  verified against its board and schematic. Lite-UFL J1 (U.FL connector) now
  carries LCSC C88374 on board and schematic; it was silently absent from
  every previous BOM.
• Substitute STEP models for antenna, crystal, switch and filter rebuilt
  from the trusted wrl geometry; STEP fit-check models match the boards.
• Schematic PDFs regenerated for all four variants.

EMC relevance (technical file): none, no electrical change; rev2 evidence
carries. The DoC pins the firmware version, unchanged here.

Assets per variant: JLCPCB fab set, STEP fit-check model, schematic PDF.

OpenRX Rev 2

All four ExpressLRS receivers ready for sample ordering. Fab sets are committed under each board's fab/ directory.

Board
OpenRX-Gemini	dual RF path, U.FL
OpenRX-Lite	chip antenna
OpenRX-Lite-UFL	U.FL variant of Lite
OpenRX-Mono	single RF path

Board work

Routing reworked on Lite (segments 313→256, vias 60→89), Lite-UFL (317→269, 61→85) and Gemini (682→688, 196→243). ExpressLRS logo footprint added to the shared library and placed on Mono.

3D model fixes

Two faults on Gemini and Mono, both drift from the shared library rather than problems in it:

• RFX2401C (U4, U7, U28) had a model offset of (-951.61, 821.31, 0), so the body rendered roughly a metre off the board and the land looked bare in the 3D viewer. Repointed at the RFX2401C model the library footprint specifies, offset zeroed, 270° rotation preserved.
• SKY13373 (U5, U8, U29) carried no model reference at all.

Both now match OpenRX-Shared.pretty, so Update Footprints from Library preserves them.

DRC

Zero unconnected items on all four boards. Remaining reports are pre-existing and reviewed:

• shorting_items on Lite and Lite-UFL are netted copper against unnetted copper inside the multi-hole TP footprints, never signal to signal
• copper_edge_clearance are the TP1-TP4 castellated pads on the board edge by design
• solder_mask_bridge on Lite-UFL is the J1 U.FL connector

Library

KiCad-Library submodule at a95b8fc.