Symptom
In tests/regress.py --full-matrix --channel 100, every cell where the RX side is RTL8814AU (devourer) returns 0 hits, regardless of TX side:
| Cell |
TX side |
RX side (devourer 8814AU) |
Result |
| 11 |
RTL8821AU (kernel) |
RTL8814AU (devourer) |
0 hits / 452 TX ✗ |
| 12 |
RTL8821AU (devourer) |
RTL8814AU (devourer) |
0 hits / 7000 TX ✗ |
| 19 |
RTL8812AU (kernel) |
RTL8814AU (devourer) |
0 hits / 450 TX ✗ |
| 20 |
RTL8812AU (devourer) |
RTL8814AU (devourer) |
0 hits / 6500 TX ✗ |
| 23 |
RTL8812AU (kernel) |
RTL8821AU (devourer) |
0 hits / 444 TX ✗ |
| 24 |
RTL8812AU (devourer) |
RTL8821AU (devourer) |
0 hits / 6500 TX ✗ |
(Cells 23/24 are devourer-RX 8821 — listed for completeness; the symptom is the same devourer-RX captures zero from any-side-TX-that's-working.)
When the same TX side (which sends 6000+ frames per cell) is paired with a kernel RX 8814AU (cells 9, 10, 17, 18), the kernel RX side captures hundreds to thousands of frames. So the TX side is fine and the chip itself receives — devourer's RX path does not surface the frames.
Reproduce
Pre-condition: full-matrix harness up (tests/setup_vm.sh).
sudo python3 tests/regress.py --full-matrix --channel 100 \
--vm-name devourer-testrig --vm-ssh josephnef@<vm-ip>Or minimally for one ordered pair:
sudo python3 tests/regress.py --tx-pid 0x0120 --rx-pid 0x8813 \
--channel 100 --vm-name devourer-testrig --vm-ssh josephnef@<vm-ip>Inspect cell logs under /tmp/devourer-regress-last/ (or --keep-logs).
What's known
Likely surfaces
src/RtlUsbAdapter.cpp:InitDvObj — bulk-IN endpoint discovery (_bulk_in_ep).src/RtlUsbAdapter.cpp async RX submission path (or sync? — needs verification).src/FrameParser.cpp — RX descriptor parsing per chip family. 8814 uses a different RX descriptor layout than 8812 in some fields.src/HalModule.cpp _InitQueueReservedPage_8814AUsb — page allocation for RX FIFO. Today's bisect verified TX FIFO drains; RX FIFO is separate.
Acceptance criteria
tests/regress.py --full-matrix --channel 100 --vm-name devourer-testrig --vm-ssh josephnef@... shows ≥ 1 hit in cells [11, 12, 19, 20]. (Cells 23/24 belong to a separate bug if the 8821 RX path is also broken.)
Not in scope here
Symptom
In
tests/regress.py --full-matrix --channel 100, every cell where the RX side isRTL8814AU (devourer)returns 0 hits, regardless of TX side:(Cells 23/24 are devourer-RX 8821 — listed for completeness; the symptom is the same
devourer-RX captures zero from any-side-TX-that's-working.)When the same TX side (which sends 6000+ frames per cell) is paired with a kernel RX 8814AU (cells 9, 10, 17, 18), the kernel RX side captures hundreds to thousands of frames. So the TX side is fine and the chip itself receives — devourer's RX path does not surface the frames.
Reproduce
Pre-condition: full-matrix harness up (
tests/setup_vm.sh).sudo python3 tests/regress.py --full-matrix --channel 100 \ --vm-name devourer-testrig --vm-ssh josephnef@<vm-ip>Or minimally for one ordered pair:
sudo python3 tests/regress.py --tx-pid 0x0120 --rx-pid 0x8813 \ --channel 100 --vm-name devourer-testrig --vm-ssh josephnef@<vm-ip>Inspect cell logs under
/tmp/devourer-regress-last/(or--keep-logs).What's known
devourer-RXcells where the DUT is RTL8814AU (and possibly RTL8821AU per the matrix snapshot above — needs confirmation in a 1-pair re-run).devourer-RXon RTL8812AU;devourer-TXon any chipset;kernel-RXon any chipset.Likely surfaces
src/RtlUsbAdapter.cpp:InitDvObj— bulk-IN endpoint discovery (_bulk_in_ep).src/RtlUsbAdapter.cppasync RX submission path (or sync? — needs verification).src/FrameParser.cpp— RX descriptor parsing per chip family. 8814 uses a different RX descriptor layout than 8812 in some fields.src/HalModule.cpp_InitQueueReservedPage_8814AUsb— page allocation for RX FIFO. Today's bisect verified TX FIFO drains; RX FIFO is separate.Acceptance criteria
tests/regress.py --full-matrix --channel 100 --vm-name devourer-testrig --vm-ssh josephnef@...shows ≥ 1 hit in cells [11, 12, 19, 20]. (Cells 23/24 belong to a separate bug if the 8821 RX path is also broken.)Not in scope here