Jaguar3 CW single-tone (DEVOURER_CW_TONE) + 8812EU DACK crash fix#170
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Extend the DEVOURER_CW_TONE MP single-tone (bare RF local-oscillator carrier) to the Jaguar3 family (rtl8822c: RTL8822CU; rtl8822e: RTL8812EU/8822EU), the last USB generation without it. SDR-validated on a USRP B210. Jaguar3's halbb/halrf generation needs two things the older chips don't, both ported from the vendor phydm MP source (phydm_mp_set_single_tone_jgr3 + phydm_set_pmac_txon_jgr3): - RF register 0x00 (RF mode/gain) is write-only through the HSSI 3-wire port (0x1808 path A / 0x4108 path B); the direct BB->RF window (0x3c00) is a read-only shadow for RF 0x00, so a window write is silently dropped. RF 0x58 (LO enable) is a normal RF reg and still uses the direct window. - The bare LO only radiates once the BB is held in continuous TX (0x1c3c/0x1a00/ 0x1ca4) with PMAC + TX-OFDM on (0x1d08/0x1e70); otherwise the BB RF state machine re-drives RF 0x00 back to RX within milliseconds and no carrier comes out. RtlJaguar3Device::StartCwTone/StopCwTone implement the full recipe (path A, CCA off, serialized on the coex _reg_mu); the coex runtime thread is not started for a tone (its periodic tick would re-drive RF 0x00). SDR results: RTL8822CU radiates a strong clean carrier on both bands (2.4 GHz +38 dBFS, carrier-to-spur 62 dB; 5 GHz c2s 51-58 dB). The 8812EU (BL-M8812EU2, 1T1R, rfe 21) radiates on both bands too, weaker — it has no 2.4 GHz PA (5 GHz only), and its bare-LO output is inherently low, but the carrier is at center and gain-responsive. 8812EU 5 GHz bring-up robustness, two fixes: - DACK/IQK status-poll loops issue tens of thousands of USB control-IN reads; a single transient glitch made rtw_read throw std::ios_base::failure and aborted bring-up. Wrap dac_calibrate() and phy_iq_calibrate() in a bounded retry (HalJaguar3::retry_cal), mirroring StartRxLoop's existing retry. - On the 8812EU at 5 GHz the FW power-mode / coex H2C steps and the GPIO_MUXCFG RFE-pin write leave the chip NAKing control-IN reads, so StartCwTone's BB reads failed. For a CW tone, arm early (right after the channel/RFE config, before those steps) and return: a bare tone needs no per-rate power / coex / FW-coex. The 5 GHz PA still needs its RFE-enable pins driven, so snapshot 0x40/0x64 first, arm the tone, then blind-write the PA pins (the write that breaks reads happens last). The plain (non-CW) TX path is unchanged. tests/cw_tone_sdr.sh gains 8822cu/8822eu cells. Jaguar1 (8812CU) 8822C regression-checked: still +38 dBFS. Builds on all per-chip CI subsets. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Extends the
DEVOURER_CW_TONEMP single-tone (bare RF local-oscillator carrier, from #165) to the Jaguar3 family — RTL8822CU (rtl8822c) and RTL8812EU/8822EU (rtl8822e) — the last USB generation without it. SDR-validated on a USRP B210. Builds on #167 (Jaguar1+Jaguar2) and current master (#169).Why Jaguar3 needs a different recipe
The halbb/halrf generation needs two things the older chips don't (ported from the vendor
phydm_mp_set_single_tone_jgr3+phydm_set_pmac_txon_jgr3):0x1808/0x4108). The direct BB→RF window (0x3c00) is a read-only shadow for RF 0x00, so a window write is silently dropped. (RF 0x58 / LO-enable is a normal reg and still uses the window.)0x1c3c/0x1a00/0x1ca4+ PMAC/TX-OFDM0x1d08/0x1e70), or the RF state machine re-drives RF 0x00 back to RX within milliseconds and no carrier comes out.RtlJaguar3Device::StartCwTone/StopCwToneimplement the full recipe (path A, CCA off, serialized on the coex_reg_mu); the coex runtime thread isn't started for a tone.SDR results
8812EU 5 GHz bring-up robustness (two fixes)
rtw_readthrowstd::ios_base::failureand aborted bring-up. Wrappeddac_calibrate()+phy_iq_calibrate()in a bounded retry (HalJaguar3::retry_cal), mirroringStartRxLoop's existing retry.GPIO_MUXCFGRFE-pin write leave the chip NAKing control-IN reads, soStartCwTone's BB reads failed. For a CW tone, arm early (after the channel/RFE config, before those steps) and return — a bare tone needs no per-rate power/coex/FW-coex. The 5 GHz PA still needs its RFE-enable pins driven, so snapshot0x40/0x64, arm, then blind-write the PA pins (the read-breaking write happens last). The plain (non-CW) TX path is unchanged.Scope / notes
tests/cw_tone_sdr.shgains8822cu/8822eucells.Closes the Jaguar3 follow-up noted in #165.
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