Cross-diff trace against widgetii/sc_sc2315e (older RE port)#150
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Cross-diff trace against widgetii/sc_sc2315e (older RE port)#150
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Closes the sixth gap from #145's plan-vs-shipped audit. The plan called for triangulating the trace against widgetii/sc_sc2315e (the older reverse-engineered port from the SC2235 SDK template, predating widgetii/smart_sc2315e). Two small relaxations in trace_diff.py let that diff run cleanly: * extract_function_body() previously hard-required `void <fn>` to open. The RE port's init returns int (`int sc2235_init(VI_PIPE)`), so the scope flag silently matched zero writes. Relaxed the regex to accept any whitespace-delimited rettype/qualifier sequence. * RE_ANY_WRITE expected the register-write call name to end at `write_register(`. The RE port uses `sensor_write_register_0(...)` (bus-numbered suffix). Allowed an optional `\w*` after `register` before the open paren. Result: pair-wise diff between trace, smart_sc2315e, and sc_sc2315e all show 100/100/100% (172 writes, 169 unique regs, identical values, identical order). Three independent artifacts converge on the same canonical SC2315E init - vendor binary, OpenIPC port from SC2231 template, RE port from SC2235 template. No drift, no missing regs. test_pipeline.sh extended with a synthetic ref using the older RE-port shape (int-returning function, _0-suffix call) so the relaxed regex never regresses. Self-diff (current shape) and cross-style (older shape) both asserted at 100% address match. Docs: new "Triangulating against multiple references" section walks through the four-way comparison procedure and the SC2315E result. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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Closes the sixth gap from #145's plan-vs-shipped audit. Triangulates the trace-extracted scaffold against the older reverse-engineered port at widgetii/sc_sc2315e in addition to widgetii/smart_sc2315e (already covered).
Headline result
Four artifacts, all converging on the same canonical SC2315E init:
smart_sc2315esc_sc2315esmart_sc2315evssc_sc2315e(refs only)172 writes, 169 unique addresses, identical values, identical order across every pair. No drift, no missing regs. The trace pipeline reliably extracts the canonical sequence, and the two independent reverse-engineering efforts converged on the exact same answer.
What changed
Two small relaxations in
trace_diff.pywere needed to make the cross-diff actually run:1.
extract_function_body()— previously hard-requiredvoid <fn>to open. The RE port's init isint sc2235_init(VI_PIPE), so the scope flag silently matched zero writes (the symptom in my first attempt). Relaxed to accept any whitespace-delimited rettype/qualifier sequence.2.
RE_ANY_WRITE— expected the register-write call name to end atwrite_register(. The RE port usessensor_write_register_0(...)(bus-numbered suffix). Allowed an optional\\w*afterregisterbefore the open paren.Both are deliberately permissive: they accept the new shapes without losing precision on the old ones.
Test plan
tools/test_pipeline.shextended with a synthetic ref using the older RE-port shape (int xxx_init,sensor_write_register_0(...)); asserts 100% match. Catches regressions in the relaxed regexes.test-extraction-pipelinejob picks up both old and new fixture assertionsAudit progress after this PR
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