Feature/implement pointwise ops#289
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Thank you for your hard work. |
The transcendental ops (log, atan, atanh, cosh, sinh, acos, asin, acosh, asinh, tanh) lower to float-only instructions. Promote non-float inputs (integers) to f32 to run them while leaving native float widths (f16/f64) untouched, so the ops stay dtype-preserving for floats. Also drop a leftover isnan debug print.
Register the new pointwise op test in the explicit allowlist so it gates PRs like the other tests.
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Bump the third-party pins to the releases that ship the new pointwise support: spike v1.0.6 (torchsim_vlog/vatan) and gem5 v1.0.2 (CustomVlog/ Vatan opclasses plus vsin/vcos/vlog/vatan decode), so CI and the base image pick them up.
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이 작업은 C++ trace 파이프라인(feature/togsim-cpp-trace) 위로 재편되어 #291 로 옮겨졌습니다. trace 브랜치에서는 VCIX lowering이 C++ mlir-opt 패스가 아니라 in-process Python 패스(passes/lower_to_vcix.py)라서, 이 master 기반 PR을 그대로 rebase하면 컴파일 파이프라인(extension_codecache.py)에서 충돌합니다. 그래서 아키텍처에 맞춰 다시 구성했습니다:
후속은 #291 에서 진행합니다. 닫습니다. |
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