AITER v0.1.17
AITER v0.1.17 — bi-weekly release.
Cut from main @ 68b5f7be plus the release-line hardening cherry-picks below.
Release-line fixes (on top of the base cut)
- #4056
[opus]gate TDM/named-barrier on clang>=22 — fixes ROCm 7.0/7.1 wheel builds (opus__builtin_amdgcn_tensor_load_to_ldsneeds ROCm 7.2 clang; guard lets clang-20/ROCm 7.1 compile) - #4064
[Gluon][MI35X]fix mqa CI failure — GLM-5 / MQA-logits gluon kernel compile on gfx950 (invalid mfma layout) - #4063
fix(moe)keep fp32 per-token scale layout for 2-stage asm stage1 — fixes a MEMORY_VIOLATION regression from #3811 on per-token fp8 MoE (affects all MoE models) - #4075 Fix int32 overflow in
batched_gemm_bf16— DeepSeek-V4 long-context path - #4051
[BugFix]get_dtype_fp8always returns the correct fp8 dtype on MI300 (gfx942) - #3988 MI350/gfx950 MLA PS-mode BF16 — support addresses over 32-bit and fix the random NaN error (long context)
- #4070 fix
max_fp8from 240 to 448 for gfx950 (fp8 e4m3fn clamp)
Wheels
6 manylinux_2_28 wheels (ROCm 7.0 / 7.1 / 7.2 x cp310 / cp312), GPU_ARCHS gfx942;gfx950, built via the official aiter-release CI (manylinux2_28-builder). Attached as CI completes.
Validation
- RC0 (base + #4056 + #4064): 5-model GSM8K 3-shot gate 9/9 PASS on MI355X (DSR1 / GLM-5 / Kimi / MiniMax-M2.5 / Qwen3-235B).
- GA line adds #4063 / #4075 / #4051 / #3988 / #4070. DSv4-Flash long-context sanity passed (validates #4075 int32 + #3988 addr>32bit); full 5-model gate soak in progress.
Full changelog: v0.1.16...v0.1.17