Skip to content

Conversation

@vg0204
Copy link

@vg0204 vg0204 commented Oct 29, 2025

We enable the SIOptimizeSexecMaskingPreRA pass just before SGPR allocation as planned for waveTransform pipeline, while reverting back to its orginal invocation in the default pipeline.

It is the continuation work on #412 .

both pipelines

We enable the SIOptimizeSexecMaskingPreRA pass just before SGPR
allocation as planned for waveTransform pipeline, while reverting back
to its orginal invocation in the default pipeline.
@vg0204 vg0204 requested review from cdevadas and jmmartinez October 29, 2025 08:57
@vg0204 vg0204 self-assigned this Oct 29, 2025
@z1-cciauto
Copy link
Collaborator


if (OptExecMaskPreRA)
addPass(&SIOptimizeExecMaskingPreRAID);
// Optimize EXEC-mask related instructions around SGPR register class.

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Can you schedule this before the RegisterCoalescer pass, one line above? The coalescer is a prepare for the next SGPR allocation pass. So don't schedule any pass in between.

Copy link
Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Sure!

@z1-cciauto
Copy link
Collaborator

@vg0204 vg0204 force-pushed the amd/dev/vikashgu/enable-SiOptimizeExecMaskingPreRA-waveTransform-default-pipeline branch from c4bb863 to 997dedf Compare October 29, 2025 10:15
@z1-cciauto
Copy link
Collaborator

@vg0204 vg0204 merged commit 30560ae into amd-feature/wave-transform Oct 29, 2025
5 checks passed
@vg0204 vg0204 deleted the amd/dev/vikashgu/enable-SiOptimizeExecMaskingPreRA-waveTransform-default-pipeline branch October 29, 2025 12:53
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

4 participants