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SharpMetal v1.0.1 — Dynamic SMP Multiprocessing, Hardware TSS Isolation & Higher-Half Descriptors

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@Sadik00789 Sadik00789 released this 07 Sep 20:31
· 0 commits to 1bc2e7c468059acdccd278e0a1c46681be146da7 since this release

SharpMetal v1.0.1: Dynamic SMP Multiprocessing, Hardware TSS Isolation & Higher-Half Descriptors

Release 1.0.1 introduces Dynamic Symmetric Multiprocessing (SMP) to SharpMetal (supporting dynamic enumeration of up to 16 cores via ACPI MADT, verified with 4 vCPUs in CI), along with architectural hardening for descriptor table virtualization, per-core hardware Task State Segment (TSS) isolation, and atomic SMP serial logging.

What's New & Architectural Updates

• Dynamic Symmetric Multiprocessing (SMP):

  • Dynamic ACPI MADT Core Discovery: Automatically detects core topology, Local APIC IDs, and processor UIDs from firmware ACPI tables, dynamically scaling across available system cores (supporting up to 16 cores).
  • AP Bootstrap Engine: Stages a 16-bit real-mode trampoline at physical address 0x0000_8000, issuing hardware INIT-SIPI-SIPI sequences via the Local APIC to bring all Application Processors online directly into 64-bit Long Mode.
  • Broadcast IPI TLB Shootdown: Synchronizes page table modifications across all active cores using vector 0xFD inter-processor interrupts with atomic acknowledgment bitmasks.
  • Multi-Core Preemptive MLFQ Scheduler: Distributes thread execution across active cores with per-core idle loops and concurrent queue dispatching.

• Strict Higher-Half Descriptor Addressing:

  • Ensures GDT, IDT, and TSS base structures and PerCpuData pointers (IA32_GS_BASE) reside strictly in canonical higher-half virtual memory (Hhdm.Base).
  • Guarantees faultless Ring 3 userland operation where low identity memory (PML4[0]) is unmapped.

• Per-Core Hardware TSS & Stack Isolation:

  • Each core maintains an isolated Task State Segment and dedicated 16 KiB interrupt stack.
  • TaskStateSegment.SetRsp0 exclusively updates the calling core's TSS.Rsp0 and KernelRsp, eliminating cross-core interrupt stack corruption during context switches.
  • Segment reload operations (ReloadSegments) hardened to preserve IA32_GS_BASE.

• Atomic Whole-Message Serial Logging:

  • Replaced character-by-character UART logging in SysLog with whole-message atomic locking via SpinLockWithIrqSave, eliminating inter-core character interleaving during concurrent userland server startup.

Verification & CI

• Verified under headless QEMU with 4 vCPUs (-smp 4) and OVMF firmware.
• All 10 boot milestones verified with zero unhandled faults, zero panics, and clean exit code 0:

  • [SMP] 4 cores synchronized and operational
  • [PASS] Concurrent zero-alloc physical frame stress test succeeded
  • [PASS] Broadcast IPI TLB shootdown verified across all active cores
  • [ROOTTASK] Initial root CNode initialized
  • [PCI] Scanning PCIe ECAM bus topology
  • [PCI] Found Host Bridge
  • [NVME] Controller initialized
  • [NVME] Block I/O benchmark passed
  • [VIRTIO-NET] Modern PCI VirtIO Network device detected
  • [SHELL] SharpMetal Bare-Metal Shell online

Quick Start (Booting under QEMU)

# 1. Download pre-built disk image from release assets
curl -LO https://github.com/Sadik00789/SharpMetal/releases/download/v1.0.1/disk.img

# 2. Create backing image for NVMe benchmark storage
qemu-img create -f raw nvme.img 64M

# 3. Launch QEMU (e.g. with 4 cores, UEFI firmware, NVMe, and VirtIO-Net)
qemu-system-x86_64 -machine q35 -cpu max -smp 4 -m 1G \
  -drive if=pflash,format=raw,readonly=on,file=/usr/share/OVMF/OVMF_CODE.fd \
  -drive file=disk.img,format=raw \
  -drive file=nvme.img,format=raw,if=none,id=nvm \
  -device nvme,serial=nvme01,drive=nvm \
  -netdev user,id=net0 -device virtio-net-pci,netdev=net0