Dual Clock Dual Port RAM using verilog
Team 1:
| Name | College |
|---|---|
| Sameeksha | Delhi Technological University |
| Aishani | DCRUST |
| Ananya Singhal | Ajay Kumar Garg Engineering College |
| Amritha Anujan | IIIT Kottayam |
Mentor: Sanjay Kumar Saini
Specification: The dual-port RAM features two independent ports, A and B, allowing both ports to perform read and write operations independently or simultaneously. Each operation (read or write) is synchronized to its respective port’s clock. Both ports have dedicated input and output connections, including data_in, wr_en (write enable), rd_en (read enable), data_out, clock, and address lines. The table below provides a description of each pin for a dual-port RAM with synchronous read functionality and separate clocks for each port.
simulation waveform:
