Sync yosys #90
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Sync yosys #90
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Avoid generating wires for function args which are constant
This reverts commit a3a90f6.
Before this fix, equiv_induct only assumed that one of the following is true: - defined value of A is equal to defined value of B - A is undefined This lets through valuations where A is defined, B is undefined, and the defined (meaningless) value of B happens to match the defined value of A. Instead, tighten this up to OR of the following: - defined value of A is equal to defined value of B, and B is not undefined - A is undefined
equiv_induct: Fix up assumption for $equiv cells in -undef mode.
Clearer for loop error messages
This fixes handling of messy cases involving repeatedly setting and removing the same init bit.
Verific - prevent exit yosys due to stored error
The main part is converting xilinx_dsp to recognize the new FF types created in opt_dff instead of trying to recognize the patterns on its own. The fsm call has been moved upwards because the passes cannot deal with $dffe/$sdff*, and other optimizations don't help it much anyway.
The main part is converting ice40_dsp to recognize the new FF types created in opt_dff instead of trying to recognize the mux patterns on its own. The fsm call has been moved upwards because the passes cannot deal with $dffe/$sdff*, and other optimizations don't help it much anyway.
Adds -noclkinv option just in case the old behavior was actually useful to someone.
cxxrtl: don't assert on wires with multiple drivers
cxxrtl: don't assert on non-constant $meminit inputs
In most cases, a CXXRTL simulation would use a top module, either because this module serves as an entry point to the CXXRTL C API, or because the outputs of a top module are unbuffered, improving performance. Taking this into account, the CXXRTL backend now runs `hierarchy -auto-top` if there is no top module. For the few cases where this behavior is unwanted, it now accepts a `-nohierarchy` option. Fixes YosysHQ#2373.
cxxrtl: run `hierarchy -auto-top` if no top module is present
Update nexus arch tests to new harness
This fixes an issue with abc/depends.sh when the compiler is clang.
Prevent CXXFLAGS from leaking to abc Makefile
Expose abc and data paths as globals for pyosys
synth_gowin: Add rPLL blackbox
* backends/blif: Remove unused vector of strings For reasons that are unclear to me, this was being used to store every result of `cstr` before returning them. The vector was never accessed otherwise, resulting in a huge unnecessary memory sink when emitting to BLIF. * backends/blif: Remove CSTR macro * backends/blif: Actually call str()
Signed-off-by: David Shah <dave@ds0.me>
nexus: Add DSP simulation model
Signed-off-by: David Shah <dave@ds0.me>
nexus: Multiplier inference support
[pull] master from YosysHQ:master
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
This is an Octopus Merge commit of the following branches: Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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