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SchematicLens

Project article & citation: 原理图不该只是给人看的:我怎样让 LLM 参与一次真实的软硬件协同设计. If this project contributes to your work, please cite the article using CITATION.cff or CITATION.bib.

Turn EasyEDA schematics into readable, diffable context for AI-assisted hardware review, firmware development, and testing.

Canonical repository: UIMicro/schematic-lens

PCB schematic tools store connectivity, while many design decisions remain in the engineer's notes and memory. A language model needs both. SchematicLens turns an EasyEDA schematic into a searchable working document that preserves:

  • exact component pin-to-net connectivity;
  • the designer's functional grouping;
  • explicit power, safety, and firmware assumptions.

The result is useful for circuit review, scoped EDA collaboration, firmware bring-up, and automated tests. It is not a replacement for datasheets, ERC/DRC, layout review, bench measurements, or engineering sign-off.

The idea in one picture

                              connection list
EasyEDA .enet ───────────────┐
                             ├── circuit-context.md ──► review
rectangles + labels ─────────┤                         firmware
                             │                         tests
datasheets + project notes ──┘

EasyEDA Skill + API Gateway: read current state, make approved edits, verify results

The API Gateway reads the currently open project. The converter turns those low-level objects into a stable connection list. Keeping those jobs separate means an Agent does not have to reconstruct the whole circuit from raw API objects during every task.

Why this is not an EDA autopilot

An MCP server or API gateway gives an Agent access to EDA operations. It does not make the Agent reliably understand snap points, junctions, hidden net identity, or human-readable schematic layout. Whole-page one-shot generation can merge independent nets or produce a drawing that is difficult to review, even when every API call succeeds.

Tool access is not circuit understanding

The bundled workflow starts from exported connectivity, keeps edits narrowly scoped, and requires netlist readback plus ERC/DRC after a change. Vision is useful for checking layout; it is not proof of electrical connectivity.

Included tools

The package installs one dependency-free Python CLI named schematic-lens:

Command Purpose
export-easyeda Read the active schematic page through API Gateway without editing it
convert Turn .enet into canonical JSON and readable Markdown
modules Recover functional regions from rectangles and schematic text
build-context Merge connectivity, functional grouping, and project requirements
check-contract Check firmware interface entries against actual nets and endpoints

Quick start

Requires Python 3.11 or newer. The offline conversion path has no third-party runtime dependencies.

python -m pip install -e .

schematic-lens convert examples/demo/schematic.enet \
  --json working/topology.json \
  --markdown working/topology.md

schematic-lens modules examples/demo/schematic-modules.raw.json \
  --json working/modules.json \
  --markdown working/modules.md

schematic-lens build-context \
  --topology working/topology.json \
  --modules working/modules.json \
  --notes examples/demo/design-notes.md \
  --output working/circuit-context.md

schematic-lens check-contract \
  --topology working/topology.json \
  --contract examples/demo/firmware-contract.json \
  --markdown working/firmware-contract.md

The contract checker catches misspelled nets, impossible endpoint claims, and missing lifecycle fields. It does not prove that a named enable signal actually implements safe shutdown; the circuit review and datasheets still have to establish that behavior.

The files under examples/demo are synthetic parser fixtures, not a reference circuit or a buildable design.

To read the current EasyEDA schematic, load the Run API Gateway extension, start its local bridge, and run:

schematic-lens export-easyeda --output-dir working/eda

The exporter uses only getter/export APIs. It filters the project netlist to the active schematic page so that connectivity and rectangle semantics describe the same scope. It also verifies that the netlist and primitive reads report the same document UUID, then writes project/document identity, UTC export time, page, and component counts to export-metadata.json. Verify those fields before relying on the snapshot.

What the representation means

The generated document keeps three kinds of information separate:

  1. The .enet export is authoritative for pin-to-net connectivity.
  2. Schematic rectangles and labels express human-authored grouping and intent.
  3. Agent findings are conclusions that must cite the first two sources and any relevant datasheet.

Read the representation note and the end-to-end workflow before applying the tools to a new board.

Optional PCB current-field companion

schematic-lens-pcb is a separate, optional companion for PCB electrical current-field screening. It is not bundled with this package and is not a runtime dependency of SchematicLens. Consult its guide only when a task needs copper current density, resistance, voltage-drop, or via-current screening.

That companion is an electrical model, not a thermal sign-off tool. Its field images help locate bottlenecks, but neither they nor an EDA screenshot establish net identity. Verify the selected net from authoritative PCB connectivity and keep thermal simulation and temperature measurement as separate validation steps.

Codex skill

The bundled design-from-readable-circuits skill teaches an Agent to:

  • verify current EDA state before acting;
  • build and interpret the generated connection list;
  • review peripheral, feedback, protection, power, layout, and thermal concerns;
  • make scoped changes with readback;
  • check firmware interface entries against the actual schematic connections;
  • refer to the optional companion guide only for PCB current-field screening;
  • keep simulated, as-designed, as-built, and measured facts distinct.

The skill composes with the EasyEDA API skill; it does not repackage or replace that integration.

Repository map

src/schematic_lens/                Python tool group
skills/design-from-readable-circuits/
                                   Reusable Codex workflow
examples/demo/                     Synthetic, disclosure-safe example
tests/                             Unit tests
docs/                              Representation and workflow notes
assets/                            One explanatory SVG
CITATION.cff / CITATION.bib        Citation metadata

Tests

python -m unittest discover -s tests -v

Codex contributors can additionally validate the bundled Skill with the quick_validate.py helper from skill-creator:

python path/to/skill-creator/scripts/quick_validate.py \
  skills/design-from-readable-circuits

Citation and license

Once published, please cite the accompanying UIMicro Blog article:

@misc{zhou2026schematiclens,
  author       = {Fangyuan Zhou},
  orcid        = {https://orcid.org/0009-0006-0747-7671},
  affiliation  = {Shanghai Jiao Tong University; Shanghai Innovation Institute},
  email        = {ui-micro@sjtu.edu.cn},
  title        = {原理图不该只是给人看的:我怎样让 LLM 参与一次真实的软硬件协同设计},
  year         = {2026},
  howpublished = {UIMicro Blog},
  url          = {https://uimicro.com/blog/schematic-lens/},
  note         = {Accompanying projects: https://github.com/UIMicro/schematic-lens and https://github.com/UIMicro/schematic-lens-pcb}
}

The same entry is stored in CITATION.bib, while CITATION.cff supplies GitHub's citation interface. Keep the article, README, BibTeX, and CFF metadata synchronized. Add a DOI only after an archive issues it.

Author: Fangyuan Zhou (ORCID 0009-0006-0747-7671), Shanghai Jiao Tong University and Shanghai Innovation Institute, ui-micro@sjtu.edu.cn.

Code, skill instructions, prose, and deterministic figures are provided under the Apache License 2.0.

Disclosure boundary

Do not publish raw EDA caches, signed URLs, account pages, credentials, hostnames, private conversations, or proprietary schematics. The demo in this repository is synthetic. A converter cannot determine whether a net name, part number, note, or topology is safe to disclose; review generated context before sharing it.

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Turn EasyEDA schematics into readable, diffable context for AI-assisted hardware review, firmware development, and testing.

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