FPGA Hypervisor
This page discusses the details of the FPGA Hypervisor we have in Galapagos. The Hypervisor abstracts away several I/O ports by providing standardized interfaces to the user. The interfaces provided are:
- AXIMM for memory (the number of ports refer to the specific board)
- AXIS for streaming data in and out to a network switch (64 bit for 10G interface 512 bit for 100G interface)
- AXI-lite for control interface from a master in either PCIe or ARM (depends if ARM is available on board)
The figure below is a representation of an FPGA Hypervisor:
The hypervisors can be found in the shells directory. In it you will find several directories. Some of these directories contain all the source files required to create a new hypervisor. We currently have support for the following boards:
- Alphadata ADM-8k5 (source files found in adm-8k5-debug)
- Fidus Sidewinder (source files found in sidewinder)
- Pynq-Z2 (source files found in pynq-z2)
- Zedboard (source files found in zedboard)
Each of the aforementioned boards has a separate directory containing all of it's source files. The structure is the following:
- constraints: contains the xdc files describing all the pins used in the hypervisor
- srcs: contains the top level src file that is a wrapper for the user application region and the hypervisor interfaces
- tclScripts: contains the tcl scripts that create the FPGA shell for the specific FPGA board
Extra directories in the shells directory include:
- tclScripts: contains tcl scripts that are used to create the standard interfaces between the application region and the shell (axis, aximm, axi-lite), making the shell projects (make_shell.tcl) which uses the board name as an argument for the subdirectory of source and constraint files, a header file describing common processes (making of a network sub ip core)
- shell_ips: contains the ip files for the TCP core. Currently in the process of including the source files to generate the IP cores from HLS but not complete yet.