sky130hd/litepci: route-fix via spread lever (util 30 / density 0.40 / halo 100) — now closes

[mguthaus]

Summary

Closes sky130hd/litepci, which was previously failing in global routing on main. Same spreading lever as PR #165 (sky130hd NVDLA partitions) and the longstanding sky130hd/cnn config, scaled for litepci's macro-pin density.

Problem

sky130hd/litepci on main fails GRT with:

[WARNING GRT-0281] Net rst has a large fanout of 3211 terminals.
Error: detail_route.tcl, 8 Global routing failed
[ERROR GRT-0116] Global routing finished with congestion

~460k total overflow, max_v=12 on met2 — local congestion from the 6-FakeRAM-macro + pcie_us-PHY layout, exacerbated by a 3211-terminal reset net. (PLACE_DENSITY_LB_ADDON was forcing density above the achieved util, packing std cells against macro pin clusters.)

Fix

Knob	Before	After
CORE_UTILIZATION	55	30
PLACE_DENSITY	— (LB_ADDON wired)	0.40
MACRO_PLACE_HALO	20 20	100 100

Drops the packing forcing function (PLACE_DENSITY_LB_ADDON), explicitly sets PLACE_DENSITY: 0.40 per the new optimize-ppa 2c' spread recipe (~10 pp below achieved util), and triples MACRO_PLACE_HALO to push std cells off the macro pin edges. This is the same family as sky130hd/cnn's 0.20 + 300 and PR #165's partition configs, scaled for litepci's macro pin density (partition_p ≤ 6 macros + central placement = halo 60; litepci 6 SRAM + PHY blackbox + 3211-fanout reset = halo 100).

Also includes the sky130hd portion of c75ea18 (FakeRAM macro rename to unified _sram naming, the sister of PR #162 for nangate45) which is required for the design to find its macros.

Validation on NRP k8s (4h57m, Complete, exit 0)

Metric	Value
Die area	105.8 mm²
Achieved util	31.4%
TNS setup	0
Hold violations	0
Cells (seq+comb)	~41 k
Macros	21
IOs	875

finish__timing__setup__ws returns a sentinel value (1e+39) — litepci has no constrained internal setup paths (PHY blackbox handles the timing-critical work). Standard for this design family.

Known DRVs (not blocking, pre-existing class)

13 028 max_slew + 427 max_cap violations. The reset net's 3211-terminal fanout is the dominant contributor — it's an RTL property, not introduced by this change. Sky130hd's coarse pitch amplifies the count vs. nangate45. Tracked as a follow-up that would need a PRE_GRT_TCL script to buffer the reset tree, or upstream RTL gating (not in scope for HighTide as a benchmark suite).

Cross-references

• PR #164 — the optimize-ppa skill's new 2c' section that documents this lever
• PR #165 — sister application of 2c' to sky130hd NVDLA partitions
• PR #162 — the matching nangate45/litepci macro rename