- Add scalar and paired-single FP arithmetic and conditional moves
- Lift TRUNC/ROUND/CEIL/FLOOR.W/L.S/D with fixed rounding semantics
- Model paired-single arithmetic and per-lane conditional moves with
  intrinsics
- Decode and lift ALIGN/DALIGN and BITSWAP/DBITSWAP
- Lift JALX, coprocessor zero-test branches, and PREFX
- Model COP2 operations, control/high-word transfers, and shadow GPR
  access with intrinsics
- Preserve branch inputs across conditional and split-register
  delay-slot writes
- Expand lifting regressions for endianness, register modes, aliasing,
  zero registers, and delay slots