Fix big-endian register parsing for GDB RSP adapter#1003
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When connecting to big-endian targets like PowerPC via QEMU, register values were being incorrectly parsed using little-endian byte order. This caused wrong PC values and prevented proper memory reads. Changes: - Parse <endian> element from target description XML when available - Add IsBigEndianArchitecture() fallback for known BE architectures (PowerPC, SPARC, M68K, S/390) - Add m_isBigEndian member variable to track target endianness - Add parseBigEndianHexToUint512() for reading BE register values - Add uint512ToBigEndianHex() for writing BE register values - Update ReadAllRegisters() and WriteRegister() to use correct endianness based on target Fixes #1000 (partial - the crash fix was in PR #1001, this addresses the endianness issue that remained after the crash was fixed) Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
…rations Right-justify bytes in the 64-byte buffer before calling intx::be::load, which expects MSB at buffer[0] for a full 512-bit value. Without this, a 4-byte register like PC=0x4082e4c0 was placed at buffer[0..3] and interpreted as the top 32 bits of a 512-bit number. Also add forward declarations for IsBigEndianArchitecture to fix compilation errors (function defined after first use in LoadRegisterInfo). Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
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Summary
<endian>element) with fallback to architecture-based detection (PowerPC, SPARC, m68k, S/390)parseBigEndianHexToUint512to right-justify bytes in the 64-byte buffer beforeintx::be::load, which previously placed a 4-byte register value like0x4082e4c0into the top 32 bits of a 512-bit numberFixes #1002
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