smepmp: isa fixup - #15
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Add a hardware probe for the Smepmp extension to the ISA validation framework. The validator checks whether the mseccfg RLB bit is writable via write-readback, since CSR_MSECCFG is shared with other extensions (e.g. Zkr) and mere CSR existence does not imply Smepmp support. If the DT claims smepmp but the hardware does not implement the RLB bit, the extension is removed from riscv,isa and riscv,isa-extensions during CPU fixup, preventing the OS from misusing it. Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
Introduce a table-driven validation framework that verifies DT-claimed ISA extensions against actual hardware capabilities during hart feature detection. Extensions that fail validation are cleared before PMP configuration and subsequent boot stages. This is necessary because fdt_cpu_fixup() runs in generic_final_init(), which is too late — hart_detect_features() has already cached the ISA extensions from DT via fdt_parse_isa_extensions(). The validation must happen inside hart_detect_features(), right after sbi_platform_extensions_init() populates the extension bitmap. Adding future validators requires only implementing a bool callback and appending to hart_ext_validators[]. Smepmp is the first validator: it probes the mseccfg RLB bit via write-readback to confirm hardware support, since CSR_MSECCFG is shared with Zkr and mere CSR existence does not imply Smepmp. Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
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