A toolkit for qLDPC processor discovery.
Three of the eight mitten codes, laid out on chip — data qubits and checks tile the plane in |G| three-by-three clusters.
yarn/
├── sqetch/ # GPU distance estimator (pip-installable package)
├── code_search/ # LP CSS code search toolkit
├── processor_codes/ # the finalized code suite: check matrices + gadgets
├── scq_hardware_layouts_HAL/ # superconducting chip layouts for the mitten codes
└── SE_cycle_movies/ # atom-array syndrome-extraction animations
sqetch and code_search are the discovery tooling; processor_codes records the codes
that came out of it; scq_hardware_layouts_HAL and SE_cycle_movies show how those codes
map onto the two hardware modalities we considered — superconducting chips and neutral-atom
arrays. Each directory has its own README with file conventions.
sqetch/— GPU random information-set decoder for estimating the minimum distance of CSS quantum codes (pip-installable Python package).code_search/— YAML-driven search toolkit for LP CSS codes over finite group algebras F₂[G]: GF(2) and group-ring primitives, distance estimators (CPU BP+OSD, GPU sqetch), paired and canonical logical bases, and the sample → filter → pair → report pipeline. Start atcode_search/README.md.
processor_codes/— the finalized rate-1/5 code suite:mitten(eight codes, [[150,30,10]] through [[975,195,24]], each with logical-measurement gadgets and the full-extractor stabilizer specification),structured_mitten(six codes), andabelian_poly_LP(one code). File conventions inprocessor_codes/README.md.scq_hardware_layouts_HAL/— superconducting hardware layouts for the eightmittencodes, produced with HAL: for each code the lowest-hardware-complexity layout we found, kept as the full HAL output (per-tier coupler routes, benchmark metrics, settings, rendered tier images) alongside aplacements/*.npzgiving every Tanner-graph node's position in both the compact and routed frames. Metric table and array conventions inscq_hardware_layouts_HAL/README.md.SE_cycle_movies/— animations of full syndrome-extraction cycles for the mitten and structured-mitten codes on atom-array layouts (2-AOD, and pipelined 4-AOD).
One full 2-AOD syndrome-extraction cycle with 2 pairs of AODs for the [[150,30,10]] mitten code (C₅×S₃):
se_cycle_c150_d10_C5xS3.mp4
We used Claude to help develop the software in this repository. The AI was used to assist with code generation, documentation, and other programming tasks. Here we document all the ways we used AI in ways that were instrumental to the results in the paper:
- We had written our GPU distance estimator in JAX in November 2025 but it was not fast enough to let us directly brute force through the search spaces we considered in the paper. We asked Claude if we could improve our distance estimator using sketching and Claude wrote the CUDA kernel that implements the
$\textsf{sQetch}$ algorithm. - We asked Claude if we could lower the HAL hardware complexity by optimizing the placement of the
$3 \times 3$ modules on the first tier so for example the non-nearest-neighbor coupler lengths could be reduced. Claude wrote the scripts that performed this optimization. - For the CPU C kernels that implement belief propagation (BP) and relay BP we simply ran Claude in a loop where it wrote a kernel, we benchmarked it on a test dataset, and we kept running this in a loop until it was fast enough.
- For the GPU CUDA kernels we asked Claude to try out all the ideas we had for how to layout BP and relay BP on the GPU. Claude implemented these ideas and wrote the actual CUDA code. Once we had a good implementation, we also ran the same automated Claude loop we ran for the CPU kernels although the throughput increase from this was much smaller compared to the throughput gains made in the first stage where we were talking with Claude and asked Claude to implement our ideas. We will provide a detailed breakdown of how our implementations improved over time in our next update to this repo.
- Telescoping decoder.