Add support for patching newer ASF4 code.

atmel-samd/asf4/patches/samd21/assert_redefined.patch

@@ -0,0 +1,20 @@
+--- samd21_vanilla/hal/utils/include/utils_assert.h	2017-09-28 12:05:22.000000000 -0700
++++ samd21/hal/utils/include/utils_assert.h	2017-09-19 13:07:29.000000000 -0700
+@@ -72,7 +72,7 @@
+ 	if (!(condition))                                                                                                  \
+ 		__asm("BKPT #0");
+ #else
+-#define ASSERT_IMPL(condition, file, line) assert((condition), file, line)
++#define ASSERT_IMPL(condition, file, line) asf_assert((condition), file, line)
+ #endif
+
+ #else /* DEBUG */
+@@ -95,7 +95,7 @@
+  * \param[in] file File name
+  * \param[in] line Line number
+  */
+-void assert(const bool condition, const char *const file, const int line);
++void asf_assert(const bool condition, const char *const file, const int line);
+
+ #ifdef __cplusplus
+ }

atmel-samd/asf4/patches/samd21/cast-align.patch

@@ -0,0 +1,12 @@
+--- samd21_vanilla/hal/src/hal_timer.c	2017-09-28 12:05:22.000000000 -0700
++++ samd21/hal/src/hal_timer.c	2017-09-19 13:07:29.000000000 -0700
+@@ -236,7 +236,10 @@
+  */
+ static void timer_process_counted(struct _timer_device *device)
+ {
++	#pragma GCC diagnostic push
++	#pragma GCC diagnostic ignored "-Wcast-align"
+ 	struct timer_descriptor *timer = CONTAINER_OF(device, struct timer_descriptor, device);
++        #pragma GCC diagnostic pop
+ 	struct timer_task *      it    = (struct timer_task *)list_get_head(&timer->tasks);
+ 	uint32_t                 time  = ++timer->time;

atmel-samd/asf4/patches/samd21/cortex_sc.patch

@@ -0,0 +1,20 @@
+--- samd21_vanilla/CMSIS/Include/core_cmInstr.h	2017-09-28 12:05:22.000000000 -0700
++++ samd21/CMSIS/Include/core_cmInstr.h	2017-09-19 13:07:29.000000000 -0700
+@@ -171,7 +171,7 @@
+ #define __BKPT(value)                       __breakpoint(value)
+
+
+-#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
++#if       (__CORTEX_M >= 0x03) || (defined(__CORTEX_SC) && __CORTEX_SC >= 300)
+
+ /** \brief  Reverse bit order of value
+
+@@ -538,7 +538,7 @@
+ #define __BKPT(value)                       __ASM volatile ("bkpt "#value)
+
+
+-#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
++#if       (__CORTEX_M >= 0x03) || (defined(__CORTEX_SC) && __CORTEX_SC >= 300)
+
+ /** \brief  Reverse bit order of value
+

atmel-samd/asf4/patches/samd21/gclk_defined.patch

@@ -0,0 +1,11 @@
+--- samd21_vanilla/hpl/gclk/hpl_gclk.c	2017-09-28 12:05:22.000000000 -0700
++++ samd21/hpl/gclk/hpl_gclk.c	2017-09-19 13:07:29.000000000 -0700
+@@ -147,7 +147,7 @@
+ 	                               | CONF_GCLK_GEN_7_SRC
+ 	                               | GCLK_GENCTRL_ID(7));
+ #endif
+-#if CONF_GCLK_GEN_8_GENEN == 1
++#if defined(CONF_GCLK_GEN_8_GENEN) && CONF_GCLK_GEN_8_GENEN == 1
+ 	hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_8_DIV) | GCLK_GENDIV_ID(8));
+ 	hri_gclk_write_GENCTRL_reg(GCLK,
+ 	                           (CONF_GCLK_GEN_8_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)

atmel-samd/asf4/patches/samd21/little_endian_redefined.patch

@@ -0,0 +1,22 @@
+--- samd21_vanilla/include/samd21e18a.h  2017-09-28 12:05:22.000000000 -0700
++++ samd21/include/samd21e18a.h  2017-09-19 13:07:30.000000000 -0700
+@@ -210,7 +210,7 @@
+  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1        
++// #define LITTLE_ENDIAN          1        
+ #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+ #define __MPU_PRESENT          0         /*!< MPU present or not */
+ #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+--- samd21_vanilla/include/samd21g18a.h  2017-09-28 12:05:22.000000000 -0700
++++ samd21/include/samd21g18a.h  2017-09-19 13:07:30.000000000 -0700
+@@ -214,7 +214,7 @@
+  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1        
++//#define LITTLE_ENDIAN          1        
+ #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+ #define __MPU_PRESENT          0         /*!< MPU present or not */
+ #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

atmel-samd/asf4/patches/samd21/make_usb_cache_accessible.patch

@@ -0,0 +1,11 @@
+--- samd21_vanilla/hpl/usb/hpl_usb.c	2017-09-28 12:05:22.000000000 -0700
++++ samd21/hpl/usb/hpl_usb.c	2017-09-19 13:07:29.000000000 -0700
+@@ -300,7 +300,7 @@
+ /** Endpoint cache buffer for OUT transactions (none-control) or SETUP/IN/OUT
+  *  transactions (control). */
+ #if CONF_USB_EP1_CACHE && CONF_USB_D_MAX_EP_N >= 1
+-static uint32_t _usb_ep1_cache[_usb_align_up(CONF_USB_EP1_CACHE) / 4];
++uint32_t _usb_ep1_cache[_usb_align_up(CONF_USB_EP1_CACHE) / 4];
+ #else
+ #define _usb_ep1_cache NULL
+ #endif

atmel-samd/asf4/patches/samd21/mark_used_no_c.patch

@@ -0,0 +1,20 @@
+--- samd21_vanilla/gcc/gcc/startup_samd21.c	2017-09-20 22:33:52.000000000 -0700
++++ samd21/gcc/gcc/startup_samd21.c	2017-09-19 13:07:30.000000000 -0700
+@@ -104,7 +105,7 @@
+ void I2S_Handler(void) __attribute__((weak, alias("Dummy_Handler")));
+
+ /* Exception Table */
+-__attribute__((section(".vectors"))) const DeviceVectors exception_table = {
++__attribute__((section(".vectors"), used)) const DeviceVectors exception_table = {
+
+     /* Configure Initial Stack Pointer, using linker-generated symbols */
+     .pvStack = (void *)(&_estack),
+@@ -234,7 +234,7 @@
+	NVMCTRL->CTRLB.bit.MANW = 1;
+
+ 	/* Initialize the C library */
+-	__libc_init_array();
++	//__libc_init_array();
+
+ 	/* Branch to main function */
+ 	main();

atmel-samd/asf4/patches/samd21/sysctrl_fix.patch

@@ -0,0 +1,11 @@
+--- samd21_vanilla/hpl/sysctrl/hpl_sysctrl.c	2017-09-28 12:05:22.000000000 -0700
++++ samd21/hpl/sysctrl/hpl_sysctrl.c	2017-09-19 13:07:29.000000000 -0700
+@@ -114,7 +114,7 @@
+
+ #if CONF_OSCULP32K_CONFIG == 1
+ 	hri_sysctrl_write_OSCULP32K_reg(hw,
+-#if OSC32K_OVERWRITE_CALIBRATION == 1
++#if CONF_OSC32K_OVERWRITE_CALIBRATION == 1
+ 	                                SYSCTRL_OSCULP32K_CALIB(CONF_OSCULP32K_CALIB) |
+ #else
+ 	                                SYSCTRL_OSCULP32K_CALIB(calib) |

atmel-samd/asf4/patches/samd21/usb_undefined.patch

@@ -0,0 +1,22 @@
+--- samd21_vanilla/usb/device/usbdc.c	2017-09-28 12:05:22.000000000 -0700
++++ samd21/usb/device/usbdc.c	2017-09-19 13:07:30.000000000 -0700
+@@ -739,7 +737,7 @@
+  */
+ int32_t usbdc_check_desces(struct usbdc_descriptors *desces)
+ {
+-#if CONF_USBD_HS_SP
++#ifdef CONF_USBD_HS_SP
+ 	int32_t rc;
+ 	if (desces->hs == NULL && desces->ls_fs == NULL) {
+ 		return ERR_NOT_FOUND;
+--- samd21_vanilla/usb/device/usbdc.h	2017-09-28 12:05:22.000000000 -0700
++++ samd21/usb/device/usbdc.h	2017-09-19 13:07:30.000000000 -0700
+@@ -105,7 +105,7 @@
+ /** Describes the USB device core descriptors. */
+ struct usbdc_descriptors {
+ 	struct usbd_descriptors *ls_fs;
+-#if CONF_USBD_HS_SP
++#ifdef CONF_USBD_HS_SP
+ 	struct usbd_descriptors *hs;
+ #endif
+ };

atmel-samd/asf4/patches/samd51/assert_redefined.patch

@@ -0,0 +1,20 @@
+--- samd51_vanilla/hal/utils/include/utils_assert.h	2017-09-20 22:33:52.000000000 -0700
++++ samd51/hal/utils/include/utils_assert.h	2017-09-19 13:07:30.000000000 -0700
+@@ -72,7 +72,7 @@
+ 	if (!(condition))                                                                                                  \
+ 		__asm("BKPT #0");
+ #else
+-#define ASSERT_IMPL(condition, file, line) assert((condition), file, line)
++#define ASSERT_IMPL(condition, file, line) asf_assert((condition), file, line)
+ #endif
+
+ #else /* DEBUG */
+@@ -95,7 +95,7 @@
+  * \param[in] file File name
+  * \param[in] line Line number
+  */
+-void assert(const bool condition, const char *const file, const int line);
++void asf_assert(const bool condition, const char *const file, const int line);
+
+ #ifdef __cplusplus
+ }

atmel-samd/asf4/patches/samd51/cast-align.patch

@@ -0,0 +1,12 @@
+--- samd51_vanilla/hal/src/hal_timer.c	2017-09-20 22:33:52.000000000 -0700
++++ samd51/hal/src/hal_timer.c	2017-09-19 13:07:30.000000000 -0700
+@@ -236,7 +236,10 @@
+  */
+ static void timer_process_counted(struct _timer_device *device)
+ {
++	#pragma GCC diagnostic push
++	#pragma GCC diagnostic ignored "-Wcast-align"
+ 	struct timer_descriptor *timer = CONTAINER_OF(device, struct timer_descriptor, device);
++	#pragma GCC diagnostic pop
+ 	struct timer_task *      it    = (struct timer_task *)list_get_head(&timer->tasks);
+ 	uint32_t                 time  = ++timer->time;

atmel-samd/asf4/patches/samd51/little_endian_redefined.patch

@@ -0,0 +1,99 @@
+--- samd51_vanilla/include/samd51g18a.h	2017-09-20 22:33:52.000000000 -0700
++++ samd51/include/samd51g18a.h 2017-09-19 13:07:30.000000000 -0700
+@@ -511,7 +512,7 @@
+  * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1
++//#define LITTLE_ENDIAN          1
+ #define __CM4_REV              1         /*!< Core revision r0p1 */
+ #define __DEBUG_LVL            3         /*!< Full debug plus DWT data matching */
+ #define __FPU_PRESENT          1         /*!< FPU present or not */
+--- samd51_vanilla/include/samd51g19a.h 2017-09-20 22:33:52.000000000 -0700
++++ samd51/include/samd51g19a.h	2017-09-19 13:07:30.000000000 -0700
+@@ -511,7 +512,7 @@
+  * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1
++//#define LITTLE_ENDIAN          1
+ #define __CM4_REV              1         /*!< Core revision r0p1 */
+ #define __DEBUG_LVL            3         /*!< Full debug plus DWT data matching */
+ #define __FPU_PRESENT          1         /*!< FPU present or not */
+--- samd51_vanilla/include/samd51j18a.h 2017-09-20 22:33:52.000000000 -0700
++++ samd51/include/samd51j18a.h	2017-09-19 13:07:30.000000000 -0700
+@@ -529,7 +530,7 @@
+  * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1
++//#define LITTLE_ENDIAN          1
+ #define __CM4_REV              1         /*!< Core revision r0p1 */
+ #define __DEBUG_LVL            3         /*!< Full debug plus DWT data matching */
+ #define __FPU_PRESENT          1         /*!< FPU present or not */
+--- samd51_vanilla/include/samd51j19a.h 2017-09-20 22:33:52.000000000 -0700
++++ samd51/include/samd51j19a.h	2017-09-19 13:07:30.000000000 -0700
+@@ -529,7 +530,7 @@
+  * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1
++//#define LITTLE_ENDIAN          1
+ #define __CM4_REV              1         /*!< Core revision r0p1 */
+ #define __DEBUG_LVL            3         /*!< Full debug plus DWT data matching */
+ #define __FPU_PRESENT          1         /*!< FPU present or not */
+--- samd51_vanilla/include/samd51j20a.h 2017-09-20 22:33:52.000000000 -0700
++++ samd51/include/samd51j20a.h	2017-09-19 13:07:30.000000000 -0700
+@@ -529,7 +530,7 @@
+  * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1
++//#define LITTLE_ENDIAN          1
+ #define __CM4_REV              1         /*!< Core revision r0p1 */
+ #define __DEBUG_LVL            3         /*!< Full debug plus DWT data matching */
+ #define __FPU_PRESENT          1         /*!< FPU present or not */
+--- samd51_vanilla/include/samd51n19a.h 2017-09-20 22:33:52.000000000 -0700
++++ samd51/include/samd51n19a.h	2017-09-19 13:07:30.000000000 -0700
+@@ -551,7 +552,7 @@
+  * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1
++//#define LITTLE_ENDIAN          1
+ #define __CM4_REV              1         /*!< Core revision r0p1 */
+ #define __DEBUG_LVL            3         /*!< Full debug plus DWT data matching */
+ #define __FPU_PRESENT          1         /*!< FPU present or not */
+--- samd51_vanilla/include/samd51n20a.h 2017-09-20 22:33:52.000000000 -0700
++++ samd51/include/samd51n20a.h	2017-09-19 13:07:30.000000000 -0700
+@@ -551,7 +552,7 @@
+  * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1
++//#define LITTLE_ENDIAN          1
+ #define __CM4_REV              1         /*!< Core revision r0p1 */
+ #define __DEBUG_LVL            3         /*!< Full debug plus DWT data matching */
+ #define __FPU_PRESENT          1         /*!< FPU present or not */
+--- samd51_vanilla/include/samd51p19a.h 2017-09-20 22:33:52.000000000 -0700
++++ samd51/include/samd51p19a.h	2017-09-19 13:07:30.000000000 -0700
+@@ -551,7 +552,7 @@
+  * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1
++//#define LITTLE_ENDIAN          1
+ #define __CM4_REV              1         /*!< Core revision r0p1 */
+ #define __DEBUG_LVL            3         /*!< Full debug plus DWT data matching */
+ #define __FPU_PRESENT          1         /*!< FPU present or not */
+--- samd51_vanilla/include/samd51p20a.h 2017-09-20 22:33:52.000000000 -0700
++++ samd51/include/samd51p20a.h	2017-09-19 13:07:30.000000000 -0700
+@@ -551,7 +552,7 @@
+  * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
+  */
+
+-#define LITTLE_ENDIAN          1
++//#define LITTLE_ENDIAN          1
+ #define __CM4_REV              1         /*!< Core revision r0p1 */
+ #define __DEBUG_LVL            3         /*!< Full debug plus DWT data matching */
+ #define __FPU_PRESENT          1         /*!< FPU present or not */

atmel-samd/asf4/patches/samd51/make_usb_cache_accessible.patch

@@ -0,0 +1,19 @@
+--- samd51_vanilla/hpl/usb/hpl_usb.c	2017-09-20 22:33:52.000000000 -0700
++++ samd51/hpl/usb/hpl_usb.c	2017-09-19 13:07:30.000000000 -0700
+@@ -299,14 +299,14 @@
+ /** Endpoint cache buffer for OUT transactions (none-control) or SETUP/IN/OUT
+  *  transactions (control). */
+ #if CONF_USB_EP1_CACHE && CONF_USB_D_MAX_EP_N >= 1
+-static uint32_t _usb_ep1_cache[_usb_align_up(CONF_USB_EP1_CACHE) / 4];
++uint32_t _usb_ep1_cache[_usb_align_up(CONF_USB_EP1_CACHE) / 4];
+ #else
+ #define _usb_ep1_cache NULL
+ #endif
+
+ /** Endpoint cache buffer for IN transactions (none-control). */
+ #if CONF_USB_EP1_I_CACHE && CONF_USB_D_MAX_EP_N >= 1
+-static uint32_t _usb_ep1_i_cache[_usb_align_up(CONF_USB_EP1_I_CACHE) / 4];
++uint32_t _usb_ep1_i_cache[_usb_align_up(CONF_USB_EP1_I_CACHE) / 4];
+ #else
+ #define _usb_ep1_i_cache NULL
+ #endif

atmel-samd/asf4/patches/samd51/mark_used_no_c.patch

@@ -0,0 +1,20 @@
+--- samd51_vanilla/gcc/gcc/startup_samd51.c	2017-09-20 22:33:52.000000000 -0700
++++ samd51/gcc/gcc/startup_samd51.c	2017-09-19 13:07:30.000000000 -0700
+@@ -314,7 +315,7 @@
+ #endif
+
+ /* Exception Table */
+-__attribute__((section(".vectors"))) const DeviceVectors exception_table
++__attribute__((section(".vectors"), used)) const DeviceVectors exception_table
+     = {
+
+         /* Configure Initial Stack Pointer, using linker-generated symbols */
+@@ -660,7 +661,7 @@
+ #endif
+
+ 	/* Initialize the C library */
+-	__libc_init_array();
++	//__libc_init_array();
+
+ 	/* Branch to main function */
+ 	main();

atmel-samd/asf4/patches/samd51/usb_undefined.patch

@@ -0,0 +1,22 @@
+--- samd51_vanilla/usb/device/usbdc.c	2017-09-20 22:33:52.000000000 -0700
++++ samd51/usb/device/usbdc.c	2017-09-19 13:07:30.000000000 -0700
+@@ -739,7 +741,7 @@
+  */
+ int32_t usbdc_check_desces(struct usbdc_descriptors *desces)
+ {
+-#if CONF_USBD_HS_SP
++#ifdef CONF_USBD_HS_SP
+ 	int32_t rc;
+ 	if (desces->hs == NULL && desces->ls_fs == NULL) {
+ 		return ERR_NOT_FOUND;
+--- samd51_vanilla/usb/device/usbdc.h	2017-09-20 22:33:52.000000000 -0700
++++ samd51/usb/device/usbdc.h	2017-09-19 13:07:30.000000000 -0700
+@@ -105,7 +105,7 @@
+ /** Describes the USB device core descriptors. */
+ struct usbdc_descriptors {
+ 	struct usbd_descriptors *ls_fs;
+-#if CONF_USBD_HS_SP
++#ifdef CONF_USBD_HS_SP
+ 	struct usbd_descriptors *hs;
+ #endif
+ };

atmel-samd/asf4/samd21/CMSIS/Include/core_cmInstr.h

@@ -523,7 +523,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value
  */
 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
 {
-  return (op1 >> op2) | (op1 << (32 - op2));
+  return (op1 >> op2) | (op1 << (32 - op2)); 
 }