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Alex edited this page Aug 1, 2026 · 9 revisions

1. Architecture Overview

RR16X is a 16-bit processor architecture.

Primary characteristics:

  • 16-bit instruction words
  • 16-bit general-purpose registers
  • banked addressing system
  • memory-mapped peripherals
  • software-defined calling convention
  • optional coprocessor/peripheral extensions

2. Register Set

General Purpose Registers

Register | Width | Purpose -- | -- | -- R0-R7 | 16-bit | General purpose

Memory

LDM

Load memory.

Format:







LDM Rd,address,Rx

STM

Store memory.

Format:







STM address,Rx,Ry

Control Flow

STJ

Store jump target.







STJ address

Conditional Branches

Signed:







JLT
JEQ
JLE
JGT
JNE
JGE

Unsigned:







JLT.U
JEQ.U
JLE.U
JGT.U
JNE.U
JGE.U

Extended conditions:







JGT.E
JGT.UE

Call







CAL address

Calls a subroutine.

Return







RET

Returns from subroutine.

Halt







HLT

Stops processor execution.

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