Skip to content

Conversation

@caosjr
Copy link
Contributor

@caosjr caosjr commented Nov 24, 2025

This PR updates the TCL scripts for generating the correct controller for 1-channel or 2-channel ADC. In that manner, the programmer does not have to select the useful data when it is using a single channel ADC.

For that, it was added NUM_OF_CHANNEL and LANES_PER_CHANNEL variables. Interleave mode is now available under the INTERLEAVE_MODE variable, which only works with NUM_OF_CHANNEL=2 and LANES_PER_CHANNEL=1. NO_REORDER is an internal variable now that is enabled according to the configuration set.

Added GPIO support for CNV so the software can control the CNV in parallel with the PWM core.

Updated the testbench for those new features: https://github.com/analogdevicesinc/testbenches/tree/ad4630_update

Updated the documentation for describing the new features.

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)
  • Documentation

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

Separates the 1CH (AD4030) HDL support from the 2CH (AD4630) support.
Previously, whenever 1CH was used it was necessary to throw away half
of the data because the project was always expecting 2 channels for the
ADC.

Updated the XDC files for each supported mode considering how the amount
of channels the ADC. Also updated the tcl script variables, now there is a
NUM_OF_CHANNEL, updated the NUM_OF_SDI to LANES_PER_CHANNEL, and
inserted INTERLEAVE_MODE variable. NO_REORDER became an internal compilation
variable that is enabled according to the combination NUM_OF_CHANNEL,
LANES_PER_CHANNEL and INTERLEAVE_MODE. Setting INTERLEAVE_MODE to 1 with
unsupported configuration throws an error.

Inserts a GPIO to drive CNV pin in parallel with the PWM. The CNV pin is an
"or" function of the GPIO[36] and PWM.

Updated examples in the README FILE.

Signed-off-by: Carlos Souza <carlos.souza@analog.com>
Updated the documentation with the new variables and features
of the AD4630_FMC project. It is describing how to compile with
the NUM_OF_CHANNEL, LANES_PER_CHANNEL, and INTERLEAVE_MODE. It
also describes the EMIO inserted for controlling the CNV output.

Signed-off-by: Carlos Souza <carlos.souza@analog.com>
Copy link
Contributor

@LBFFilho LBFFilho left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Looks good, builds fine, makes parametrization nicer, and fixes the weird usage for 1ch.
A few minor comments only.

Signed-off-by: Carlos Souza <carlos.souza@analog.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

3 participants