add some basic structure for quantizer, io and simd operators by LHT129 · Pull Request #25 · antgroup/vsag

LHT129 · 2024-09-12T02:40:54Z

only header for quantizer and io
fp32 quantizer as example

inabao · 2024-09-12T03:01:15Z

+
+private:
+    [[nodiscard]] inline bool
+    CheckValidOffset(uint64_t size) const {


unify the naming convention; our private methods generally use the underscore naming style. (check_valid_offset)

inabao · 2024-09-12T07:58:08Z

+#include "fixtures.h"
+using namespace vsag;
+
+#define TEST_RECALL(Func)                                                              \


Renaming it to TEST_ACCURACY would be more accurate.

inabao · 2024-09-12T07:59:55Z

+        auto val = query[i] - codes[i];
+        result += val * val;
+    }
+    return result;


There is no sqrt in the result. So, it is better to rename it to "FP32ComputeL2".

L2Sqr is the Square of L2 norm

inabao · 2024-09-12T08:02:50Z

+private:
+    uint64_t dim_{0};
+
+    uint64_t codeSize_{0};


unify the code style.

codeSize -> code_size_

ShawnShawnYou · 2024-09-13T03:03:22Z

+    auto* outVec = new float[dim];
+    quant.DecodeOne(codes, outVec);
+    for (int i = 0; i < dim; ++i) {
+        REQUIRE(std::abs(vecs[idx * dim + i] - outVec[i]) < error);


should replace abs with fabs?

For integral arguments, the integral overloads of std::abs are likely better matches.
reference: https://en.cppreference.com/w/cpp/numeric/math/fabs

ShawnShawnYou · 2024-09-13T03:10:59Z

+        sum = _mm256_add_ps(sum, _mm256_mul_ps(a, b));  // accumulate the product
+    }
+    alignas(32) float result[8];
+    _mm256_store_ps(result, sum);  // store the accumulated result into an array


When n == 0, the store instruction (e.g. _mm256_store_ps) still occur in the avx512, avx2, and sse operators that may be harmful to the performance. Is it possible to add a judgment to skip these store instructions?

yeah, I have fixed it

ShawnShawnYou · 2024-09-13T03:21:31Z

+        } else if (metric == vsag::MetricType::METRIC_TYPE_L2SQR) {
+            gt = L2Sqr(data + idx1 * dim, query + i * dim, &dim);
+        }
+        REQUIRE(std::abs(gt - value) < 1e-4);


inabao

LGTM

wxyucs

lgtm

jiaweizone · 2024-09-14T07:34:45Z

+
+namespace vsag {
+
+template <typename IOTmpl>


IOTmpl need any interface limit ?

jiaweizone · 2024-09-14T07:44:41Z

+    return ret;
+}
+void
+MemoryIO::PrefetchImpl(uint64_t offset, uint64_t cacheLine) {


explicit mark cacheLine to unused ?
cacheLine -> cache_line

code style will be modified in following pull request

jiaweizone · 2024-09-14T07:50:59Z

+
+namespace vsag {
+
+template <MetricType Metric = MetricType::METRIC_TYPE_L2SQR>


Metric -> metric

jiaweizone · 2024-09-14T07:57:55Z

+    }
+
+    inline void
+    Prefetch(uint64_t offset, uint64_t cacheLine = 64) {


cacheLine -> cache_line

jiaweizone · 2024-09-14T07:58:11Z

+    MultiReadImpl(uint8_t* datas, uint64_t* sizes, uint64_t* offsets, uint64_t count) const;
+
+    inline void
+    PrefetchImpl(uint64_t offset, uint64_t cacheLine = 64);


cacheLine -> cache_line

jiaweizone · 2024-09-14T07:59:19Z

+
+    uint64_t codeSize_{0};
+
+    bool isTrained_{false};


isTrained_ -> is_trained_

jiaweizone · 2024-09-14T07:59:36Z

+private:
+    uint64_t dim_{0};
+
+    uint64_t codeSize_{0};


codeSize -> code_size_

jiaweizone · 2024-09-14T08:11:25Z

+    } else if (Metric == MetricType::METRIC_TYPE_COSINE) {
+        return InnerProduct(codes1, codes2, &this->dim_);  // TODO
+    } else {
+        return 0.;


Signed-off-by: LHT129 <tianlan.lht@antgroup.com>

…up#25) Signed-off-by: LHT129 <tianlan.lht@antgroup.com>

Signed-off-by: LHT129 <tianlan.lht@antgroup.com>

…up#25) Signed-off-by: LHT129 <tianlan.lht@antgroup.com> Signed-off-by: Sia Sheerland <x1075956441x@163.com> Signed-off-by: Sia Sheerland <x1075956441x@163.com>

LHT129 force-pushed the lht_dev branch from d66c9db to d717176 Compare September 12, 2024 02:44

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LHT129 force-pushed the lht_dev branch from f421f5f to b610b7c Compare September 14, 2024 02:51

inabao approved these changes Sep 14, 2024

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wxyucs added the kind/improvement Optimizations, UX polish, or minor improvements 性能优化、体验打磨或细节改良 label Sep 18, 2024

add some basic structure for quantizer, io and simd operators

64fc87e

Signed-off-by: LHT129 <tianlan.lht@antgroup.com>

LHT129 force-pushed the lht_dev branch from 0e8c538 to 64fc87e Compare September 23, 2024 03:49

LHT129 merged commit 33755e1 into main Sep 23, 2024

LHT129 deleted the lht_dev branch September 23, 2024 05:56

LHT129 mentioned this pull request Sep 25, 2024

Add a new Layer "DataCell" to manage data access #40

Closed

Roxanne0321 pushed a commit to Roxanne0321/vsag that referenced this pull request Mar 3, 2025

add some basic structure for quantizer, io and simd operators (antgro…

7dc8925

…up#25) Signed-off-by: LHT129 <tianlan.lht@antgroup.com>

LHT129 mentioned this pull request Dec 23, 2025

Tsan error on HNSW's Multi-threading Test #1458

Open

LHT129 added a commit that referenced this pull request May 11, 2026

add some basic structure for quantizer, io and simd operators (#25)

3f8bff6

Signed-off-by: LHT129 <tianlan.lht@antgroup.com>


		namespace vsag {

		template <MetricType Metric = MetricType::METRIC_TYPE_L2SQR>

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LHT129 commented Sep 12, 2024

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