GH-49325: [C++] Check if YMM register saving is OS enabled

[AntoinePrv]

Rationale for this change

Current behaviour is not correct.

What changes are included in this PR?

Check if YMM register saving is enabled by the OS before enabling AVX detection.

Are these changes tested?

Hard to, because we cannot set the value being read manually.

Are there any user-facing changes?

No.

• GitHub Issue: Check that YMM register saving is enabled before using AVX at runtime #49325

[github-actions]

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See also:

• Other pull requests
• Contribution Guidelines - Contributing Overview

[github-actions]

⚠️ GitHub issue #49325 has been automatically assigned in GitHub to PR creator.

[pitrou]

@github-actions crossbow submit -g cpp

[github-actions]

Revision: 87ff21c

Submitted crossbow builds: ursacomputing/crossbow @ actions-895c581763

Task	Status
example-cpp-minimal-build-static
example-cpp-minimal-build-static-system-dependency
example-cpp-tutorial
test-build-cpp-fuzz
test-conda-cpp
test-conda-cpp-valgrind
test-debian-13-cpp-amd64
test-debian-13-cpp-i386
test-debian-experimental-cpp-gcc-15
test-fedora-42-cpp
test-ubuntu-22.04-cpp
test-ubuntu-22.04-cpp-20
test-ubuntu-22.04-cpp-bundled
test-ubuntu-22.04-cpp-emscripten
test-ubuntu-22.04-cpp-no-threading
test-ubuntu-24.04-cpp
test-ubuntu-24.04-cpp-bundled-offline
test-ubuntu-24.04-cpp-gcc-13-bundled
test-ubuntu-24.04-cpp-gcc-14
test-ubuntu-24.04-cpp-minimal-with-formats
test-ubuntu-24.04-cpp-thread-sanitizer

[pitrou]

@github-actions crossbow submit win

[pitrou]

LGTM and it seems to conform to Intel's own recommendations. Let's just wait for CI

[github-actions]

Revision: 87ff21c

Submitted crossbow builds: ursacomputing/crossbow @ actions-8b588b027e

Task	Status
test-build-vcpkg-win
verify-rc-source-windows
wheel-windows-cp310-cp310-amd64
wheel-windows-cp311-cp311-amd64
wheel-windows-cp312-cp312-amd64
wheel-windows-cp313-cp313-amd64
wheel-windows-cp313-cp313t-amd64
wheel-windows-cp314-cp314-amd64
wheel-windows-cp314-cp314t-amd64

[AntoinePrv]

Actually it seems we should also check a flag for SSE.

[pitrou]

Actually it seems we should also check a flag for SSE.

I don't think that's necessary, we consider SSE mandatory.

[raulcd]

Not sure if that's relevant as I am not an expert on this area but should we also check Xmm for SSE?
I was reading the info shared on the issue and found they are checking it there:
https://github.com/google/cpu_features/blob/545431d64a43f683d75e51c36df19f90afe82752/src/impl_x86__base_implementation.inl#L403-L426

[AntoinePrv]

@pitrou I believe this is all OK

[raulcd]

ok, just saw the rest of the comments, seems fine as you are the experts here :)

[conbench-apache-arrow]

After merging your PR, Conbench analyzed the 1 benchmarking run that has been run so far on merge-commit aea1ad3.

There were no benchmark performance regressions. 🎉

The full Conbench report has more details. It also includes information about 57 possible false positives for unstable benchmarks that are known to sometimes produce them.