arch/arm/stm32: Support optional TX/RX UART GPIOs.#18975
Merged
linguini1 merged 1 commit intoMay 27, 2026
Conversation
The STM32 serial drivers already treat 0 as not present for optional GPIO fields (CTS, RTS), guarding each call site with a != 0 check. TX and RX GPIO fields lacked this guard, so boards that define GPIO_UARTx_TX or GPIO_UARTx_RX as 0 (pin not routed) caused stm32_configgpio(0) to be called, which silently configures PA0 as a floating input, corrupting any other peripheral using that pin. Having an optional TX/RX UART is useful for several cases: * RX-only connections: e.g. radio control input on flight-controllers where no TX is wired. * Single-wire (half-duplex) connections: e.g. ESC telemetry connections. * Output-only NSH which prints output but does not allow entering inputs. Without a sentinel value for these cases one must assign the unused GPIO to a NC pin, which is misleading when reading board configuration files. Add != 0 guards for tx_gpio and rx_gpio across all STM32 serial driver families. Using 0 as the sentinel is safe for TX/RX because any valid UART config requires GPIO_ALT bits set in the config word, so 0 can never represent a real TX or RX pin configuration. Signed-off-by: alexcekay <alexander@auterion.com>
xiaoxiang781216
approved these changes
May 27, 2026
linguini1
approved these changes
May 27, 2026
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
The STM32 serial drivers already treat 0 as not present for optional GPIO fields (CTS, RTS), guarding each call site with a
!= 0check.TX and RX GPIO fields lacked this guard, so boards that define
GPIO_UARTx_TXorGPIO_UARTx_RXas 0 (pin not routed) causedstm32_configgpio(0)to be called, which silently configures PA0 as a floating input, corrupting any other peripheral using that pin.Having an optional TX/RX UART is useful for several cases:
Without a sentinel value for these cases one must assign the unused GPIO to a NC pin, which is misleading when reading board configuration files.
This PR adds
!= 0guards fortx_gpioandrx_gpioacross all STM32 serial driver families.Using 0 as the sentinel is safe for TX/RX because any valid UART config requires
GPIO_ALTbits set in the config word, so 0 can never represent a real TX or RX pin configuration.Impact
GPIO_UARTx_TX/GPIO_UARTx_RXas 0 this fixes the problem of unintendedly altering PA0Testing
Tested on a v6s flight-controller (STM32H743VIH6) where we have the following in the board configuration
With the change the following was observed:
PX4_RESTRICTED_BUILDis set but does not allow the user to enter data