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{bp-19468} arch/risc-v: qemu: don't rewind interrupt stack sp on nested trap - #19627

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xiaoxiang781216 merged 1 commit into
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Aug 3, 2026
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{bp-19468} arch/risc-v: qemu: don't rewind interrupt stack sp on nested trap#19627
xiaoxiang781216 merged 1 commit into
apache:releases/13.0from
jerpelea:bp-19468

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@jerpelea jerpelea commented Aug 3, 2026

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Summary

qemu-rv's S-mode/non-SMP setintstack unconditionally reloaded sp to the top of the per-cpu interrupt stack. A trap taken while already running on that stack rewound sp back to the same address, so the nested trap's frame overwrote the still-live outer trap's frame.

Port the bounds check already used by the canonical setintstack in riscv_macros.S: only move sp when it is outside the interrupt stack range.

Other vendor chip.h files have the same unconditional-reload pattern and are left for a follow-up.

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qemu-rv's S-mode/non-SMP setintstack unconditionally reloaded sp to
the top of the per-cpu interrupt stack.  A trap taken while already
running on that stack rewound sp back to the same address, so the
nested trap's frame overwrote the still-live outer trap's frame.

Port the bounds check already used by the canonical setintstack in
riscv_macros.S: only move sp when it is outside the interrupt stack
range.

Other vendor chip.h files have the same unconditional-reload pattern
and are left for a follow-up.

Signed-off-by: liang.huang <liang.huang@houmo.ai>
@github-actions github-actions Bot added Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Size: S The size of the change in this PR is small labels Aug 3, 2026
@xiaoxiang781216
xiaoxiang781216 merged commit e9ac40a into apache:releases/13.0 Aug 3, 2026
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@jerpelea
jerpelea deleted the bp-19468 branch August 3, 2026 13:23
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Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Size: S The size of the change in this PR is small

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3 participants