[Target][RISC-V] Use riscv_cpu device key for RISC-V target tags - #19915
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Previously, the RISC-V tag helper used the ARM CPU keys and device metadata,
so Target("riscv/...") expanded with keys ["arm_cpu", "cpu"] and device
"arm_cpu". This is misleading for code that inspects target keys or device
metadata to distinguish CPU families.
This change updates the RISC-V tag helper to use keys ["riscv_cpu", "cpu"]
and device "riscv_cpu", while keeping kind="llvm". It also adds the
SpacemiT K3 RISC-V target tag.
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Code Review
This pull request corrects the base configuration keys and device type for RISC-V CPU tags from 'arm_cpu' to 'riscv_cpu' and registers a new tag for the 'riscv/spacemit-k3' target. Feedback was provided to correct the 'mcpu' value from 'spacemit-x100' to 'spacemit-x60' to prevent LLVM compilation failures, as 'spacemit-x100' is not a supported LLVM CPU target.
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| { | ||
| "num-cores": 8, | ||
| "mtriple": "riscv64-unknown-linux-gnu", | ||
| "mcpu": "spacemit-x100", |
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The SpacemiT K3 SoC is based on the SpacemiT X60 CPU core. LLVM supports '-mcpu=spacemit-x60', but there is no 'spacemit-x100' CPU target in LLVM. Using 'spacemit-x100' will cause LLVM compilation to fail with an unknown CPU error. Please update 'mcpu' to 'spacemit-x60'.
| "mcpu": "spacemit-x100", | |
| "mcpu": "spacemit-x60", |
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Actually, SpacemiT K1-based platforms appear to use the X60 core, while the K3 platform is based on the X100 core.
2 participants
RISC-V target tags use the LLVM codegen backend, so their target kind should remain "llvm". However, the target metadata should still identify the target as a RISC-V CPU rather than an ARM CPU.
Previously, the RISC-V tag helper used the ARM CPU keys and device metadata, so Target("riscv/...") expanded with keys ["arm_cpu", "cpu"] and device "arm_cpu".
{"kind": "llvm", "keys": ["arm_cpu", "cpu"], "device": "arm_cpu"}This is misleading for code that inspects target keys or device metadata to distinguish CPU families.
This change updates the RISC-V tag helper to use keys ["riscv_cpu", "cpu"] and device "riscv_cpu", while keeping kind="llvm". It also adds the SpacemiT K3 RISC-V target tag.