[CUDA][TIRx] Allow collector-A-only SM107 block-scale MMA and open cp.async wait_group immediates - #20271
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spectrometerHBH merged 1 commit intoSep 5, 2026
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….async wait_group immediates - tcgen05.mma block-scale SM107 entries: collector B is optional, so the collector-A-only form is accepted alongside the A+B form. - cp.async.wait_group / cp.async.bulk.wait_group N is an OPEN immediate. PTX ISA 9.7.10.28.3.3 / 9.7.10.28.6.2 define N only as an integer constant with no value domain, and CUDA 13.4 ptxas at sm_107a accepts values beyond 7 (8, 9, 16, 255; the bulk .read form also 2147483647 and -1). Enumeration and full-table certification sample the operand at 0 and certify the instruction shape. Squash of: - [CUDA][TIRx] Allow collector-A-only SM107 block-scale MMA - feat(lower-tirx): open cp.async wait-group immediates
jinhongyii
approved these changes
Sep 5, 2026
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Summary
Two
T.ptxtable follow-ups to #20266 (python/tvm/backend/cuda/ptx/table.py).tcgen05.mmablock-scale entriescollector_bbecomes optional, so the activation-stationary FP8 form with collector A alone is accepted alongside the A+B form.cp.asyncwait-group immediates.cp.async.wait_group Nandcp.async.bulk.wait_group[.read] Nno longer restrictNto0..7. PTX ISA 9.7.10.28.3.3 / 9.7.10.28.6.2 defineNonly as an integer constant with no value domain, and CUDA 13.4 ptxas at sm_107a accepts values beyond 7 (measured: 8, 9, 16, 255; the bulk.readform also 2147483647 and -1). Each call-site constant still becomes its own helper; enumeration and full-table certification sample the open operand at 0 and certify the instruction shape.Tests (
tests/python/tirx/codegen/test_ptx_dialect.py)test_ptx_tcgen05_mma_block_scale_collector_a_without_block_size: SM107 activation-stationary FP8 accepts collector A without.block*.Downstream
Needed by the Rubin masked grouped GEMM and block-scaled fused-MoE SwiGLU ports in mlc-ai/tirx-kernels.