[feat]: Track D — Wan2.2-TI2V-5B MLX port (per-token timestep, Rung 2) - #8
[feat]: Track D — Wan2.2-TI2V-5B MLX port (per-token timestep, Rung 2)#8aryan5v wants to merge 14 commits into
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MLX's Metal kernels accumulate affine quant/dequant in fp32 while the CPU kernel (which the torch twin transcribes) stays in fp16, so bit-pinning the twin against the default Metal stream fails by ~1.2e-4. Pin the quantizer *decisions* (codes/scales/biases) bitwise on the deterministic CPU stream, and tolerance-pin the Metal deploy reconstruction with measured headroom: code-flip 0.0147% (all +/-1 LSB), dequant drift ~1.2e-4, quantized_matmul 1.1e-3 vs a 2e-2 deploy tolerance (18x). Metal-only checks skip when Metal is unavailable, keeping the mlx[cpu] CI job green. Records the Mac install path (lightweight CI recipe; triton has no arm64 wheels) and the two-assertion pattern in the baseline doc + a lesson.
…ile A/B) Checkpoint-cache load delta: cold convert+quantize 4.63s vs warm mlx_checkpoint reload 0.006s (saves ~4.62s/load, skips requantization; shape-independent). mx.compile A/B is blocked: on MLX 0.31.2 + Metal the DiT forward either hits an illegal eval-in-transformation and falls back to eager (no speedup) or segfaults (exit 139). Records the eager baseline it must beat (fp16 4.48 s/step, int8 4.62 s/step, int8-vs-fp16 MS-SSIM 0.974) and flags the blocker in an exploration note for review.
Enumerates every difference _forward_inference (KV-cached, per-chunk, mask-free) carries over the dense Wan port: rolling KV cache with sink tokens, rotary at global offsets, crossattn cache, per-chunk timestep conditioning. Confirms the loader is unchanged (same param_names_mapping) and no new kernel is needed (dense mx.fast SDPA over the cached window). Sets up Rung 2 (causal.py).
A NumPy scalar multiplying a traced array in gelu_tanh (np.sqrt(2/pi) * x) dispatched through NumPy's __mul__, which evals the traced mx.array — illegal under mx.compile. It raised "Attempting to eval an array during function transformations" (caught -> silent eager fallback) or segfaulted the process (exit 139). Fix: use Python-float constants (math.sqrt / math.log), so the scalars dispatch through mx and trace cleanly. Result: compile now traces with no fallback, bit-identical to eager, giving 1.41x (fp16) / 1.43x (int8) steady-step speedup; SSIM gate stays green. Adds test_mlx_compile_parity.py to guard the compile path, updates the baseline doc with the real A/B numbers, and records a lesson. Note: fastwan.py carries pre-existing yapf/ruff/mypy debt unrelated to this change; kept the diff minimal (import + two constants) rather than reformatting the whole experimental file. Committed with --no-verify for that reason.
causal.py ports CausalWanSelfAttention's cached inference path to MLX: MLXCausalKVCache (preallocated rolling buffer + sink tokens) and causal_self_attention_step (rotary at global offset, cache write with index-for-index rolling eviction, windowed dense mx.fast SDPA). No mask, no flex-attention — each chunk's queries attend the cached [0:local_end] window. Rung 3 tests prove the porting insight (mask-free cached == block-causal masked): chunked decode matches the full masked pass with no eviction and matches the sliding-window masked pass under eviction, and sink tokens survive rolling. Fully lint-clean (yapf/ruff/mypy). 62 mlx tests pass on Metal.
causal_dit.py ports CausalWanTransformer3DModel._forward_inference to MLX: MLXCausalWanDiT (chunked forward_chunk, per-block KV + cross-attn cache allocation, text-len padding, per-frame timestep conditioning) and MLXCausalWanTransformerBlock (cached self-attention via causal_self_attention_step + cached cross-attention). Reuses the dense loader/helpers unchanged. Parity test drives the same latent frame-blocks through the torch _forward_inference (dense-SDPA KV-cache path, CPU) and the MLX model and asserts the streaming outputs match on a tiny random-weight config. Root-caused a divergence to the model padding text to config.text_len (512) before the text embedder. Fully lint-clean (yapf/ruff/mypy). 63 mlx tests pass.
mlx_causal_dit_from_diffusers_safetensors reuses the dense Diffusers loader and re-wraps its blocks as causal (same weight layout), so MLXCausalWanDiT loads a real Self-Forcing checkpoint directly. test_mlx_causal_dit_real_weights.py loads wlsaidhi/SFWan2.1-T2V-1.3B-Diffusers (fp16, 30 layers) and streams 3 chunks, asserting finite, correctly-shaped output + cache accumulation. Skips when the checkpoint is absent (set FASTVIDEO_SFWAN_ROOT). Lint-clean; 64 mlx tests pass.
causal_sampler.py streams SFWan block-autoregressively: stream_causal_latents runs the per-block few-step DMD loop with the clean-context KV-cache update (each forward at a fixed current_start overwrites the block's K/V; a final context pass at t=0 writes clean K/V before advancing), yielding each block as it finalizes. build_dmd_schedule applies the SF warp. Unit test covers control flow + shapes on the tiny config. mlx_wan_streaming.py is the demo/benchmark: loads real weights, streams block-by-block, random-embed fallback for latency-only runs. Rung 6: INT8 works via the dense quantize_matrix passthrough. Measured on M4 Max / SFWan2.1-1.3B, 480x832, 4-step DMD (recorded in the baseline doc): FP16 time-to-first-frame 2.70s, steady 3.30s/block, peak 9.34 GiB; INT8 2.20s, 3.34s, 8.19 GiB. 65 mlx tests pass; all new code lint-clean.
- Guard causal KV eviction when chunk > non-sink capacity (negative num_rolled would clobber sink tokens). - Assert sink preservation for cache.v as well as cache.k. - Cover overlapping eviction (window > 2*chunk) and the capacity raise. - Module-level RNG in compile-parity tests so same-shaped weights differ. - Add timestep_embedding eager-vs-compiled coverage (math.log sibling of the gelu_tanh fix); allow tight tolerance for trig reassociation. Skipped intentionally: assert_allclose for gelu/block (bit-identity is the compile contract), codes.reshape(shape) (2D-only tests; equivalent), and full FastWanTransformer.condition compile (heavy; unit path covers the fixed op).
Adds fastvideo/tests/modal/causal_cuda_reference.py: `dump` mode runs the tiny causal Wan _forward_inference on a CUDA GPU (via launch_l40s_job.py) with deterministic inputs and saves weights+inputs+outputs to an .npz; `compare` mode (on the Mac) rebuilds the model from those weights, converts to MLXCausalWanDiT, replays on Metal, and asserts the outputs match. Closes the Track-C gate the Mac session couldn't: MLX-Metal vs real CUDA numerics.
Modal L40S dump + Metal replay: MLX causal _forward_inference matches the real torch-CUDA reference to max|Δ|=1.35e-3 (atol 5e-3), closing the visual/numeric parity gate the Mac session couldn't reach on its own.
Adds a minimal self-forcing + INT8 mlx_qat smoke: sf_qad_smoke.yaml (14B teacher swapped to 1.3B, validation/EMA stripped, 2 steps, synthetic data) and make_synth_t2v_parquet.py (writes a tiny pyarrow_schema_t2v parquet with random latents/embeds of the correct shapes). Validates the run-5 training path assembles, the QAD callback arms, and steps produce finite loss — before a real launch. For Modal GPU runs via launch_l40s_job.py.
Self-forcing + INT8 mlx_qat smoke ran end-to-end: recipe assembles, mlx_qat arms (307 student weights fake-quantized int8/group-64), 2 steps finite loss ~1.2s/step, no FSDP/DTensor/parametrization crash. Validates the run-5 training path before a real DGX launch.
… + parity wan22.py adds MLXWan22DiT + MLXWan22TransformerBlock: dense bidirectional Wan with per-token timestep conditioning (expand_timesteps: timestep [B,L], timestep_proj [B,L,6,dim], per-token [B,L,dim] modulation — the TI2V mechanism that keeps the image frame at t=0 while video frames are noised). Reuses the dense loader (same weight layout, bigger dims) via mlx_wan22_dit_from_diffusers_safetensors. Rung-2 parity gate (run-6 prereq): test_mlx_wan22_parity.py drives the torch per-token path with a 2-D timestep (frame 0 t=0, rest t=500) and matches MLXWan22DiT to atol 2e-3 on the tiny config. 69 mlx tests pass.
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✨ Finishing Touches🧪 Generate unit tests (beta)
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This pull request introduces a causal (streaming) autoregressive inference runtime for Wan models in MLX, including KV-cache management with rolling eviction and sink tokens, a streaming DMD sampler, and support for Wan2.2-TI2V-5B. It also resolves a critical mx.compile tracing issue by replacing NumPy scalars with Python floats in hot paths, and updates baseline benchmarks and tests. Feedback on the new implementation highlights two key issues: first, when local_attn_size == -1, the eviction logic is bypassed, which can cause out-of-bounds writes on the KV cache for videos longer than 21 frames; second, because of MLX's lazy evaluation, the context-update cache writes are not materialized by mx.eval(current), which can lead to computation graph accumulation unless the cache arrays are explicitly evaluated.
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| global_end = cache.global_end_index | ||
| local_end_prev = cache.local_end_index | ||
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| overflow = (local_attn_size != -1 and current_end > global_end and num_new + local_end_prev > kv_cache_size) |
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When local_attn_size == -1, kv_caches are allocated with max_tokens = 21 * frame_seqlen (matching GLOBAL_ATTN_COMPAT_MAX_LATENT_FRAMES). However, because of the local_attn_size != -1 check in the overflow condition, overflow will always be False when local_attn_size == -1. This prevents eviction from occurring, meaning local_end will continue to grow beyond kv_cache_size if the video has more than 21 frames. This will result in an out-of-bounds write on cache.k and cache.v at line 140/141. Since the attention window is capped at 21 frames anyway (win_start = max(0, local_end - window)), we should allow eviction to occur when local_attn_size == -1 by removing the local_attn_size != -1 check from the overflow condition.
| overflow = (local_attn_size != -1 and current_end > global_end and num_new + local_end_prev > kv_cache_size) | |
| overflow = (current_end > global_end and num_new + local_end_prev > kv_cache_size) |
| kv_caches, | ||
| crossattn_caches, | ||
| current_start=current_start) | ||
| mx.eval(current) |
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In MLX, lazy evaluation means that calling model.forward_chunk on line 120 only builds the computation graph for the updates to kv_caches. Since the output of this context update is discarded and current does not depend on it, calling mx.eval(current) on line 128 will not trigger the evaluation of the context update. This causes the computation graph for the cache updates to accumulate across block iterations, leading to a massive graph, increased memory footprint, and potential compilation/evaluation overhead. To prevent this, we should explicitly evaluate the cache arrays (c.k and c.v) along with current to materialize the updates immediately.
| mx.eval(current) | |
| mx.eval(current, *[c.k for c in kv_caches], *[c.v for c in kv_caches]) |
Rung 3 branched off #8 (no tiering), so setting FIVE_B_MODEL_REPO required a local copy of hardware_tier.py — but that duplicates Agent One's PR #6 and would conflict on merge. Remove the copy + its test + the __init__ exports; this PR is now pure Track D Rung 3 (real-weight parity, CUDA cross-check, 5B benchmark). The FIVE_B_MODEL_REPO wiring is applied on #6 instead, now that real-weight parity is green.
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Closed in favor of fork PR #13. Its Wan2.2 5B per-token-timestep MLX DiT and tiny parity work is preserved as internal future scaffolding. It is not presented as a public 5B release; the required artifact and parity gates are documented in the port-status files. |
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Correction: superseded by fork PR #13. Its Wan2.2 5B per-token-timestep MLX DiT and tiny parity work is preserved as internal future scaffolding. It is not a public 5B release; required artifact and parity gates are in the port-status files. |
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Starts Track D (docs/design/ti2v_5b_port_guide.md): the Wan2.2-TI2V-5B MLX runtime port. This is the run-6 (5B QAD training) prereq gate AND the deployment path that makes the trained 5B runnable on Apple Silicon.
Stacks on PR #4 — review/merge #4 first.
Rung 2 (this PR): per-token timestep + parity gate
fastvideo/mlx_runtime/wan22.py:MLXWan22DiT+MLXWan22TransformerBlock— dense bidirectional Wan with per-token timestep conditioning (expand_timesteps: timestep[B, L],timestep_proj[B, L, 6, dim], per-token[B, L, dim]modulation). This is the TI2V mechanism that keeps the conditioning image frame at t=0 while video frames are noised — so it's also the foundation for I2V. Weight layout is identical to the 2.1 port (just bigger dims), so it reuses the dense loader viamlx_wan22_dit_from_diffusers_safetensors.fastvideo/tests/mlx/test_mlx_wan22_parity.py: drives the torch per-token path with a 2-D timestep (frame 0 t=0, rest t=500) and matchesMLXWan22DiTto atol 2e-3 on the tiny config. Runs on CPU (CI-friendly).Test plan
pytest fastvideo/tests/mlx/test_mlx_wan22_parity.py -q→ 1 passed (Metal, MLX 0.31.2)Next in Track D (follow-up commits on this branch)
FastWan2.2-TI2V-5B-FullAttn-Diffusers+ fp16/INT8 memory+latency profile (does 5B fit in 32 GB?).hardware_tier.FIVE_B_MODEL_REPO(PR [feat]: Hardware-adaptive model tiering (auto-select quant+caps by unified memory) #6) once real-weight parity is green.