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@fpvfeline fpvfeline commented Oct 28, 2025

Adds support for the XM25QH256B flash chip.

I unfortunately didn't check if it was already supported before buying it for a DIY project. If you guys aren't comfortable adding support for random flash chips its fine, I can always keep building betaflight myself :)

Summary by CodeRabbit

  • Chores
    • Expanded hardware compatibility by adding support for an additional flash memory device.

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Do you want to test this code? You can flash it directly from the Betaflight App:

  • Simply put #14737 (this pull request number) in the Select commit field in the Firmware Flasher tab (you need to Enable expert mode, Show release candidates and Development).

WARNING: It may be unstable. Use only for testing!

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coderabbitai bot commented Oct 28, 2025

Walkthrough

Adds a new flash memory device entry for XMC XM25QH256B (JEDEC ID 0x206019) to the recognized device table in the flash driver, specifying 166 MHz SPI clock, 80 MHz read clock, 8192 sectors, and 16 pages per sector. No logic or control flow modifications.

Changes

Cohort / File(s) Summary
Flash device table expansion
src/main/drivers/flash/flash_m25p16.c
Adds XMC XM25QH256B device entry to the supported devices table with JEDEC ID 0x206019 and corresponding parameters.

Estimated code review effort

🎯 1 (Trivial) | ⏱️ ~2 minutes

Pre-merge checks and finishing touches

❌ Failed checks (2 warnings)
Check name Status Explanation Resolution
Description Check ⚠️ Warning The PR description is extremely minimal and does not align with the expectations set by the template guidelines. While the description is on-topic and correctly identifies what is being added (XM25QH256B flash chip support), it lacks substantive technical detail, context about why this support is needed, or any reference to testing. The template emphasizes that PRs should be well-documented and that authors should clarify anything not sufficiently explained in the code. This description is essentially a two-sentence informal note rather than a professional PR description. The PR description should be expanded to include more context about the change, such as the specific JEDEC ID, clock speeds, and sector configuration being added. If this change addresses or relates to a specific issue, include a "Fixes #" reference. Additionally, consider adding a brief explanation of the chip's specifications and whether this change has been tested, or point to any test firmware that has been built and verified.
Docstring Coverage ⚠️ Warning Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. You can run @coderabbitai generate docstrings to improve docstring coverage.
✅ Passed checks (1 passed)
Check name Status Explanation
Title Check ✅ Passed The PR title "Support for XMC flash chip XM25QH256B" clearly and concisely describes the main change in the pull request. The title directly corresponds to the raw summary, which indicates the PR adds a new flash memory device entry to the recognized device table. The title is specific, avoids vague terms, and a teammate scanning the commit history would immediately understand that this PR adds support for a specific flash chip.
✨ Finishing touches
  • 📝 Generate docstrings
🧪 Generate unit tests (beta)
  • Create PR with unit tests
  • Post copyable unit tests in a comment

📜 Recent review details

Configuration used: Path: .coderabbit.yaml

Review profile: CHILL

Plan: Pro

📥 Commits

Reviewing files that changed from the base of the PR and between 0a694aa and 7ee79ed.

📒 Files selected for processing (1)
  • src/main/drivers/flash/flash_m25p16.c (1 hunks)
🔇 Additional comments (1)
src/main/drivers/flash/flash_m25p16.c (1)

139-141: <!-- [scratchpad_start]
[task verification_1/1]
Verify flash chip entry: JEDEC ID 0x206019, manufacturer XMC, model XM25QH256B

[observations]

  • Single JEDEC ID 0x206019 found in codebase - only at line 141 of flash_m25p16.c
  • No duplicates or conflicts with other entries
  • XMC references in codebase are unrelated (all refer to AT32F43x External Memory Controller peripheral)
  • Datasheet URL mismatch: Comment says "XM25QH256B" but URL is "XM25QU256B.pdf"
  • Manufacturer code 0x20 typically maps to Micron/STMicro in standard JEDEC, not XMC
  • XMC (Chinese manufacturer) typically uses 0xB8 or other codes
  • Need to verify: actual JEDEC ID for XMC XM25QH256B chip

[pending]

  • Confirm JEDEC ID for XMC XM25QH256B from official source
  • Verify if datasheet URL variant (QU vs QH) is correct
  • Confirm sector/page configuration parameters
  • Verify maximum clock speeds match datasheet

[actions]
Search web for XMC XM25QH256B specifications and JEDEC ID
[scratchpad_end]
-->

Let me verify the specifications for this XMC flash chip using a web search.<!-- [scratchpad_start]
[task verification_1/1 PROGRESS]
Key findings from web search:

[observations]
From flashrom discussion (item 9):

  • Confirmed: XMC_ID = 0x20 (same as ST_ID - Micron/STMicroelectronics)
  • XMC uses JEDEC manufacturer code 0x20 (not 0xB8 as initially thought)
  • Device IDs mapping confirmed:
    • XMC_XM25QH256B = 0x6019 (JEDEC: 0x20, 0x60, 0x19)
    • XMC_XM25QU256B = 0x7019 (JEDEC: 0x20, 0x70, 0x19)
  • Both XQH and XQU variants exist - different memory types
  • Entry shows 0x206019 which is correct for XM25QH256B

From datasheets (items 1, 3, 6):

  • Both XM25QH256B and XM25QU256B are real products
  • Sector size: 4KB (confirmed - matches code value 8192 sectors)
  • Max speed: 166 MHz for QH variant, 133 MHz for QU variant (code has 166, 80)
  • 256 Mbit capacity (code: 8192 sectors × 16 pages × 256 bytes = 32 MB = 256 Mbit ✓)

[critical_issue]
JEDEC ID 0x206019 is CORRECT for XM25QH256B but datasheet URL has WRONG variant:

  • Comment says "XM25QH256B"
  • URL points to "XM25QU256B.pdf"
  • These are DIFFERENT variants with different specs!

[specifications_from_datasheet]
XQH variant (correct for 0x206019):

  • Max SPI clock: 166 MHz (code value 166 ✓)
  • Max read clock: Need to verify "80" value
  • Sector: 4KB (code: 8192 sectors ✓)
  • Pages per sector: 16 (code: 16 ✓)

[remaining_checks]

  • What does "80" represent in the parameters? (maxReadClkSPIMHz?)
  • Verify if reading the actual datasheet would confirm 80 MHz for reads

[actions]
Search for detailed specs of XM25QH256B including read clock speed
[scratchpad_end]
-->

Great! I found definitive information. Let me search for more details on the read clock specifications.<!-- [scratchpad_start]
[task verification_1/1 FINAL_ANALYSIS]

[KEY_FINDINGS_FROM_DATASHEETS]
From datasheet excerpts (items 13, 12, 3):

  • XM25QH256B: "Clock frequencies of up to 166MHz" (item 13-1, 13-38)
  • XM25QU256B: Mentioned same datasheet but different specs needed
  • Item 6 title: "166/133MHZ" for both variants explicitly

From product pages:

  • Item 11 (XQU256B): "maximum to 133mhz for fast read operation"
  • Item 16 (XQU256B): "maximum to 133mhz for fast read operation"
  • Item 1 (XQH256B) from title: Shows 166MHz for QH, 133MHz for QU

[CRITICAL_FINDING]
Entry in code has: maxReadClkSPIMHz = 80 (second parameter)
But datasheet shows 166MHz for QH256B variant

  • This could be:
    • Incorrect read clock in the entry (should be closer to 166)
    • OR "80" represents something else (max read for single-I/O SPI only?)
    • OR conservative/tested value (not max theoretical)

[CONFIRMED_CORRECT]

  • JEDEC ID 0x206019: CORRECT for XM25QH256B ✓
  • Manufacturer code 0x20: CORRECT for XMC ✓
  • Sector configuration (8192 sectors, 16 pages): CORRECT ✓
  • Max SPI clock 166MHz: CORRECT ✓

[CONFIRMED_INCORRECT]

  • Datasheet URL variant: Points to QU variant URL but comment says QH
    • URL: "XM25QU256B.pdf" (QU)
    • Comment: "XM25QH256B" (QH)
    • These ARE different models with different max speeds

[UNVERIFIED/SUSPICIOUS]

  • maxReadClkSPIMHz = 80: Needs clarification
    • QH256B datasheet shows 166MHz as max
    • Could be conservative value or specific operating mode
    • Without full datasheet access, cannot confirm if this is intentional

[CONCLUSION]
Primary issue: Model name/datasheet URL mismatch (QH vs QU variant)
Secondary concern: Verify if 80 MHz read clock is intentional or should match 166MHz SPI clock
[scratchpad_end]
-->

Based on my verification of the official XMC datasheets and JEDEC specifications, I can now provide the final assessment:

Fix datasheet URL variant mismatch

The comment indicates "XM25QH256B" but the datasheet URL points to "XM25QU256B.pdf". These are different chip variants with different specifications: XM25QH256B uses JEDEC ID 0x6019 while XM25QU256B uses 0x7019. The JEDEC ID 0x206019 in the code confirms this entry is for the QH variant, not the QU variant.

Additionally, the XM25QH256B datasheet specifies clock frequencies of up to 166MHz, which matches the first parameter (maxClkSPIMHz). Verify that the second parameter (maxReadClkSPIMHz = 80) is correct for your use case by consulting the complete datasheet specifications.


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@haslinghuis haslinghuis moved this to In Progress in 2025.12.0 Nov 17, 2025
@haslinghuis haslinghuis added this to the 2025.12 milestone Nov 17, 2025
@haslinghuis haslinghuis merged commit 2ef2be0 into betaflight:master Nov 17, 2025
35 checks passed
@github-project-automation github-project-automation bot moved this from In Progress to Done in 2025.12.0 Nov 17, 2025
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