Vero Designer 1.5

Version 1.5.0

• Added perfboards
• Added view modes
• Added tube models (12AT7, 12AY7, E88CC)
• Added voltage regulator types (78L09, 78L12, 78L15)
• Added the option to change electrolytic capactors size
• Added the option to move edge connections to the other side of the board
• Added pinout editor
• Added "export dual display" setting
• Added "Share" option (mobile only)
• Safari/macOS/iOS/iPadOS optimization
• Extended Generic IC to use 4 & 6 total pins
• Fixed "Update IDs"

Vero Designer 1.4

Version 1.4.0

• Added an option to move edge connections
• Added cycling component models and types using mouse scroll wheel when drawing (Op-amps and transistors only)
• Added optional smaller components in schematic view
• Added "Show pin numbers" option
• Added live component count
• Moved text labels closer to the component when vertical
• Added new transistors
• Added new ICs
• Added trimpot types
• Added adjustable pin space on "Other ICs"
• Added "Other ICs" to auto describe
• Fixed "generated layout" data not being reset after closing project
• Changed regulator UI to transistor UI

Vero Designer 1.3

Version 1.3.0

• Added tubes
• Added MOSFETs
• Added settings
• Added 'change net color' option
• Added component count
• Added estimated board size
• Added resize board from all sides
• Added themes
• Added color customization
• Added vero grid
• Added zoom in & zoom out shortcuts (W - zoom in, Q - zoom out)
• Added full screen button
• Added mouse scroll button navigation
• Added option to 'verify' layouts
• Added creator name
• Added daisy IC (under "Other IC's")
• Moved critical errors to status bar
• Fixed 'Auto-describe' not describing input connected through potentiometer
• Fixed 2SK30A pinout and package orientation
• Fixed common wiring issues
• Reduced interactive area around component pins

Vero Designer 1.2

Version 1.2.0

• Added KiCad importer (BETA)
• Added marquee selection
• Added new component models
• Added Auto-describe
• Added generic IC (under "Other IC's")
• Added 3PST & 3PDT
• Added ground symbol to GND quick net
• Added new icons for the editing tools
• Added standing resistors option
• Added duplicate shortcut (Ctrl/Cmd+D)
• Expanded grid
• Improved wiring (each line is editable)
• Fixed transistor's schematic symbol pinout letters
• Fixed component icons on left sidebar

Vero Designer

Version 1.1.0

• Added "sticky components" option
• Added flip (mirror) component option
• Added Copy/Paste buttons
• Added schematic view zoom
• Added minimize right sidebar option
• Added transistor models
• Added trim pots
• Added SP3T & DP3T
• Added zener & schottky diodes
• Added potentiometer resistance value field
• Added "Export BOM" button
• Improved component selection
• Improved wiring & wires selection
• Improved tool switching
• Fixed component connection points drawn off-grid
• Fixed transistor displayed wrong package orientation
• Fixed polarized capacitor schematic symbol
• Fixed component symbol sizes
• Fixed "Input" quick label orientation
• Fixed op-amp text
• Links & cuts can be deleted from the generated layout
• Changed transistor look & feel
• Generated vero saved with the project file
• Custom net labels default to "Onboard"
• Changing net label affects duplicates
• Broken net/physical short message highlighted in red

Vero Designer

v1.0.40

first commit